After writing the command header/descriptor for the SATA controller it seems I have to wait a long period (in the order of ms) before I can execute the command by updating the SATA_CQR register. If I do not wait for the period between writing to the command header/descriptor and the SATA_CQR, I get an error in SATA_CER.
Any ideas?
[I have fiddled with cache settings to no avail]