MMA8452 : TRANSIENT_THS register DBCNTM bit behavior

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MMA8452 : TRANSIENT_THS register DBCNTM bit behavior

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koichisakagami
Contributor II

Dear community,

I consider the TRANSIENT_THS register DBCNTM bit.

I can find the FF_MT_THS register DBCNTM behavior with Figure 13. DBCNTM bit function Diagram
in the Data Sheet.

[Question]
Does the TRANSIENT_THS register DBCNTM bit  behave in the same way as the FF_MT_THS DBCNTM bit ?

       Best Regards,
       Koichi Sakagami

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TomasVaverka
NXP TechSupport
NXP TechSupport

Dear Koichi-san,

Yes, it behaves the same way for all portrait/landscape, freefall/motion and transient functions.

DBCNTM = 0 - Decrement counter on every ODR cycle whenever condition of interest is no longer valid.

DBCNTM = 1 - Clear counter whenever condition of interest is no longer valid.

Best regards,

Tomas

PS: If my answer helps to solve your question, please mark it as "Correct". Thank you.

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TomasVaverka
NXP TechSupport
NXP TechSupport

Dear Koichi-san,

Yes, it behaves the same way for all portrait/landscape, freefall/motion and transient functions.

DBCNTM = 0 - Decrement counter on every ODR cycle whenever condition of interest is no longer valid.

DBCNTM = 1 - Clear counter whenever condition of interest is no longer valid.

Best regards,

Tomas

PS: If my answer helps to solve your question, please mark it as "Correct". Thank you.

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