Hi
I have a question about the JTAG_TMS / SWD_DIO pin on the S32K1xx. We are using SWD for debug and have an external 10k pull up on the JTAG_TMS/SWD_DIO pin according to the recommendations in the Hardware Design Guidelines (AN5426). But, in the Safety Manual the following text can be found: In the field, JTAG_TMS should be pulled low to ensure that JTAGC TAP controller is disabled.
So, should we connect the pin directly to ground to disable debugging? Feels risky to use pull down resistor since the pin has an internal weak pull up.
/Johan
Solved! Go to Solution.
Hi
The JTAG_TMS should be pulled high as mentioned in the application note as well as reference manual. SM Rev6 will be released soon that will fix this issue in the Safety Manual.
Regards
-Aarul
Hi
The JTAG_TMS should be pulled high as mentioned in the application note as well as reference manual. SM Rev6 will be released soon that will fix this issue in the Safety Manual.
Regards
-Aarul
I am also interested in knowing the answer to the question. Could someone from NXP answer it please?