s32k116 and s32k144 flash erase difference

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s32k116 and s32k144 flash erase difference

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1,473 Views
中当陈
Contributor III

I used the same function to erase s32k116 and s32k144,the function is FLASH_DRV_EraseSector.

And my question is when I erase s32k116 flash I must put the fucntion FLASH_DRV_EraseSector in ram, otherwise the MCU would be reset.but when I erase s32k144 flash, I can put he fucntion FLASH_DRV_EraseSector in flash, and MCU runs well. I also know when MCU is erasing flash, MCU should not accese flash. But why s32k144 can access flash while erasing flash? 

The function FLASH_DRV_EraseSector  as follow:

uint32 FLASH_DRV_EraseSector(uint32 dest, uint32 size)
{
uint32 ret = RESULT_OK; /* Return code variable */
uint32 sectorSize; /* Size of one sector */
uint32 tempSize = size; /* Temporary of size variation */


LMEM->PCCCR = 0x85000001; /* Invalidate cache & enable write buffer, cache */
MSCM->OCMDR[0] = 0x00000020; /* Bit 5 = 1: Enable program flash prefetch buffer */
MSCM->OCMDR[1] = 0x00000020; /* Bit 5 = 1: Enable data flash prefetch buffer */

sectorSize = (uint32)FEATURE_FLS_PF_BLOCK_SECTOR_SIZE;

/* Check if the size is sector alignment or not */
if ((tempSize & (sectorSize - 1U)) != 0U)
{
/* Return an error code */
return RESULT_ERR;
}

while ((tempSize > 0U) && (RESULT_OK == ret))
{
/* Check CCIF to verify the previous command is completed */
if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
{
ret = RESULT_ERR;
}
else
{
/* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
CLEAR_FTFx_FSTAT_ERROR_BITS;

/* Passing parameter to the command */
FTFx_FCCOB0 = FTFx_ERASE_SECTOR;
FTFx_FCCOB1 = GET_BIT_16_23(dest);
FTFx_FCCOB2 = GET_BIT_8_15(dest);
FTFx_FCCOB3 = GET_BIT_0_7(dest);

/* Calling flash command sequence function to execute the command */
ret = FLASH_DRV_CommandSequence();

/* Update size and destination address */
tempSize -= sectorSize;
dest += sectorSize;
}
}

return ret;
}

 

Look forward to your feedback, Thank you in advance!

Best regards!

Chen

 

 

 

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1 Solution
1,454 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Chen,

This is not allowed on either of the two MCUs.

This implementation is out of the specs, so, the functionality is not guaranteed.

danielmartynek_0-1641894220268.png

 

Regards,

Daniel

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2 Replies
1,455 Views
danielmartynek
NXP TechSupport
NXP TechSupport

Hello Chen,

This is not allowed on either of the two MCUs.

This implementation is out of the specs, so, the functionality is not guaranteed.

danielmartynek_0-1641894220268.png

 

Regards,

Daniel

1,421 Views
中当陈
Contributor III

Get it, Thanks a lot.

Chen

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