Hi,
Customer: IO Controls
Part: S32K3xx
I am working with a customer switching from MPC5747G to the S32K3xx MCU since MPC5748 lacks the feature to set the “CAN messages ID” as the FCAN receive/send MBDT block input.
There seems to be an issue in the SDK for the S32k1xx. When the CAN id is an extended id, the SRR bit must be set. But the SDK generates the SRR bit as cleared. I have attached the link of the previous post here: How to set S32K CAN bit-SRR to 1 - NXP Community
I have not been able to confirm if this bug has been fixed, has it been resolved?
If it has not been resolved for the S32K1xx, is it also an issue on the S32K3xx?
Thanks,
Brendan
Solved! Go to Solution.
Hi Brendan,
Chapter 2.2 List of fixed issues from S32K1xx RTM 4.0.2. of S32SDK_for_S32K1xx_RTM_4.0.3_ReleaseNotes.pdf mentioned can_pal CAN extended message TX, SRR bit wrong configuration.
This bug has been fixed. It's not an issue on the S32K3xx.
Best Regards,
Robin
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Hi Brendan,
Chapter 2.2 List of fixed issues from S32K1xx RTM 4.0.2. of S32SDK_for_S32K1xx_RTM_4.0.3_ReleaseNotes.pdf mentioned can_pal CAN extended message TX, SRR bit wrong configuration.
This bug has been fixed. It's not an issue on the S32K3xx.
Best Regards,
Robin
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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