I was testing some fault handling and explicitly called NVIC_SystemReset() to trigger a reset.
It does not seem to work. I confirmed that the SYSRESETREQ bit is set and the processor is just running the NOP indefinitely.
/**
\brief System Reset
\details Initiates a system reset request to reset the MCU.
*/
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
{
__DSB(); /* Ensure all outstanding memory accesses included
buffered write are completed before reset */
SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
SCB_AIRCR_SYSRESETREQ_Msk ); /* Keep priority group unchanged */
__DSB(); /* Ensure completion of memory access */
for(;;) /* wait until reset */
{
__NOP();
}
}
also tested commenting out __DSB() and writing directly to SCB->AIRCR
SCB->AIRCR = 0x05fA0004;
same result. reset does not occur.
also tested removing the debugger and doing a powercycle and it just boots up and then gets stuck in the NOP.
Solved! Go to Solution.
So I think the answer here is that Cortex M7 reset request (SCB->AIRCR "SYSRESETREQ") is not implemented in the s32k344.
(@petervlna please let me know if I'm mistaken about this.)
If someone else stumbles upon this and needs to perform functional or destructive resets from software here is a distilled version of what the POWER IP module does.
/// S32K344_MC_ME.h
/* MC_ME - Peripheral instance base addresses */
/** Peripheral MC_ME base address */
#define IP_MC_ME_BASE (0x402DC000u)
/** Peripheral MC_ME base pointer */
#define IP_MC_ME ((MC_ME_Type *)IP_MC_ME_BASE)
/// S32K344_MC_ME.h
void perform_functional_reset(void)
{
// functional reset request
IP_MC_ME->MODE_CONF = 0x2U;
IP_MC_ME->MODE_UPD = 0x1U;
IP_MC_ME->CTL_KEY = 0x00005AF0U;
IP_MC_ME->CTL_KEY = 0x0000A50FU;
}
void perform_destructive_reset(void)
{
// destructive reset request
IP_MC_ME->MODE_CONF = 0x1U;
IP_MC_ME->MODE_UPD = 0x1U;
IP_MC_ME->CTL_KEY = 0x00005AF0U;
IP_MC_ME->CTL_KEY = 0x0000A50FU;
}
also probably good practice to check Functional and destructive reset reason on boot up and clear the flags for FES.
uint32_t f_reset_reason = IP_MC_RGM->FES;
uint32_t d_reset_reason = IP_MC_RGM->DES;
// clear the reset reason
IP_MC_RGM->FES = f_reset_reason;
So I think the answer here is that Cortex M7 reset request (SCB->AIRCR "SYSRESETREQ") is not implemented in the s32k344.
(@petervlna please let me know if I'm mistaken about this.)
If someone else stumbles upon this and needs to perform functional or destructive resets from software here is a distilled version of what the POWER IP module does.
/// S32K344_MC_ME.h
/* MC_ME - Peripheral instance base addresses */
/** Peripheral MC_ME base address */
#define IP_MC_ME_BASE (0x402DC000u)
/** Peripheral MC_ME base pointer */
#define IP_MC_ME ((MC_ME_Type *)IP_MC_ME_BASE)
/// S32K344_MC_ME.h
void perform_functional_reset(void)
{
// functional reset request
IP_MC_ME->MODE_CONF = 0x2U;
IP_MC_ME->MODE_UPD = 0x1U;
IP_MC_ME->CTL_KEY = 0x00005AF0U;
IP_MC_ME->CTL_KEY = 0x0000A50FU;
}
void perform_destructive_reset(void)
{
// destructive reset request
IP_MC_ME->MODE_CONF = 0x1U;
IP_MC_ME->MODE_UPD = 0x1U;
IP_MC_ME->CTL_KEY = 0x00005AF0U;
IP_MC_ME->CTL_KEY = 0x0000A50FU;
}
also probably good practice to check Functional and destructive reset reason on boot up and clear the flags for FES.
uint32_t f_reset_reason = IP_MC_RGM->FES;
uint32_t d_reset_reason = IP_MC_RGM->DES;
// clear the reset reason
IP_MC_RGM->FES = f_reset_reason;
Hi @not_a_duck,
Yes, that's correct.
https://community.nxp.com/t5/S32K/S32K344-software-reset-fail/m-p/1454018#M15288
Regards,
Daniel