Hi NXP Friends,
I am working on generating a PWM signal with a frequency of 50kHz. My core system clock is set to 160MHz. According to my calculations, setting the default period to 3200 should divide the 160MHz clock down to 50kHz. However, I'm encountering issues where the oscilloscope shows no signal at all.
As I decrease the default period (thereby increasing the PWM frequency), the PWM signal starts to look messy and unreliable.
Is there a limitation in the driver that prevents achieving a 50kHz PWM frequency? Am I missing something in the configuration that could be causing these issues?
Any insights or suggestions would be greatly appreciated. Thank you!
已解决! 转到解答。
Hi VaneB,
Sorry for the late response. This issue is solved as we were connecting the PWM to an inductive load. After adding a diode to the output, the wave looks perfect.
Hi @noobsplzwin
Which S32K3 device are you using? Is it a custom board or one of our EVBs? The configurations seem correct, also I saw that you enabled the Freeze state, this is freezing the UC in its current state while in Debug mode could you please let me know the behavior of the signal while not in freeze mode? Did you test any of the PWM example codes? if yes, did you observe the same behavior?
B.R.
VaneB