S32KDS board clock generator

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S32KDS board clock generator

3,492 Views
Twokey
Contributor II

Hello, I have a work to write C program in S32K142 MCU.

The develoment platform is S32K design stduio (S32KDS) Ver. 3.5,

I use the S32KDS embedded "Board initial pins" and "Peripheral clock" to generate related hardware configuration.

The original generated configuraion settings will be occured "HardFault_Handler".

I found all the PORTA_CLK ~ PORTE_CLK seem to have no clock.

So, I use the initial pins to config the I/O ports and the MCU will be crash.

The program will be work after I add

PCC-> PCCn[PCC_PORTn_INDEX] = PCC_PCCn_CGC_MASK;    

code to enable port clock.

The attached files are the pin and clock configs and auto generations by S32KDS platform.

How to fix the auto clock generate issue. Thanks.   

Twokey 

 

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3,340 Views
Twokey
Contributor II

Hi, Robin

   The S32KDS platform and SDK were changed to V3.4 and V4.0.3 yesterday.

I try to run S32SDK_S32K1xx_RTM_4.0.3 example code (driver/timer/ftm_pwm. 

I am very supries it is still ot work. This example code also has HARDFault during step by step debug.

This issue is the same as preious location. Pleasse see the  following pictures.

Twokey_0-1680141983718.png

Twokey_1-1680142522951.png

 

 

So, it is not related to the versions of SDK_RTM and S32KDS platform.

Could oyu help us to check the sample code.

Thanks,

Twokey 

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3,325 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

I am able to debug ftm_pwm_s32k142 project on S32K142EVB without error.

ftm_pwm_s32k142.png

Please show me the part number of your S32K142, for example: PS32K142UAVLLT is the chip on my S32K142EVB.

S32K142EVB.jpg

Maybe we should check whether your chip is different form mine by refer to the "3.2 Ordering information" of S32K1xx MCU Family - Data Sheet.

 

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3,323 Views
Twokey
Contributor II

Hi, Robin

    It's a good new.

Here is our used MCU which code is FS32K142HATOMLHT.

Twokey_0-1680151743884.png

Twokey_1-1680151768724.png

Please help us tyo check it, Thanks.

 

Twokey

 

 

 

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3,125 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

PS32K142UAVLLT        U:112MHz    LL:100LQFP    V: -40C to 105C
FS32K142HATOMLHT  H:80MHz     LH:64LQFP      M: -40C to 125C

I don't know if it is caused by the frequency difference. (Your chip seems don't need to select HSRUN mode. Please select RUN mode.) 

Please test attached hello_world_s32k142 project(toggle PTE7\10 and PTD15\16).

I don't know if you have an 8MHz external crystal oscillator, so I chose FIRC.

If you still encounter HardFault, please debug and check whether the clock gate is enabled through CLOCK_SYS_SetPccConfiguration in the CLOCK_DRV_Init function.

CLOCK_DRV_Init CLOCK_SYS_SetPccConfiguration.png

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3,388 Views
Twokey
Contributor II

Hi, Robin

   My S32KDS is Version 3.5.

The same as "desginer1258475" proposed in 2023/1/29 that the "Extensions and Updates" dialog can not find S32K1 SDK4.0.3.

Ths dialog is captured as following:

Twokey_0-1680056495747.png

Thanks,

Twokey

 

 

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3,381 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

According to the ReleaseNotes of S32K1 SDK, RTM4.0.1 is developed with S32DS v3.3(not v3.5).
Please install SDK RTM4.0.3 in S32DS v3.4, and tell me the test results?

RTM4.0.1 v3.3 RTM4.0.3 v3.4.png

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3,417 Views
Twokey
Contributor II

Dear Robin:

   Thanks for your suggerstion, 

I re-wrote the main.c code as you suggested, however, it still doesn't work.

This program is also crash, "HARDFault" in PINS_DRV_Init() fucntion.

The developmenmt environment of  S32KDS platform is Ver. 3.5 and  uses  S32K142_SDK_4.01,

I also attached the full test project.

Could you have any suggestion.

Thanks,

Twokey

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3,457 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

Hi 

Sorry I may not have understood your question.
Did you refer to the example of the S32K1 SDK? The clock gate is initialized in the following function:
/* Configure clocks for PORT */
error = CLOCK_DRV_Init(&clockMan1_InitConfig0);
By the way: Does this problem still exist with S32K1 SDK v4.0.3 in S32DS v3.4?


Best Regards,
Robin
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3,443 Views
Twokey
Contributor II

Hi, Robin

Thanks for your reply.

I  tihnk this issue is on clock config, but I don't know hot to fix.

I had write a simple test projec and it is just te set 3 GPIO pins

The hardware init function (prvSetupHardware()) is written in main.c and listed  as following: 

However, a hardware fault will be occured during operation.

This program will be ok, if I active the port enable code (In the Bold font type change #if 0 to #if 1)

This test project is also shown in the attached file.

Could you call me how to fix this clock config issue. Thanks.

static void prvSetupHardware(void)
{

/* Initialize and configure clocks
* - Setup system clocks, dividers
* - see clock manager component for more details
*/
CLOCK_SYS_Init(g_clockManConfigsArr, CLOCK_MANAGER_CONFIG_CNT,
g_clockManCallbacksArr, CLOCK_MANAGER_CALLBACK_CNT);
#if 0
PCC-> PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT B */
PCC-> PCCn[PCC_PORTE_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT E */
#endif
CLOCK_SYS_UpdateConfiguration(0U, CLOCK_MANAGER_POLICY_AGREEMENT);

PINS_DRV_Init(NUM_OF_CONFIGURED_PINS0, g_pin_mux_InitConfigArr0);

/* Initialize LPI2C Master configuration
* - Fast operating mode, 400 KHz SCL frequency
* - See LPI2C components for configuration details
*/

//PINS_DRV_WritePin(ENABLE_V_GPIO, ENABLE_V_PIN, 1); // Enable Power PTE10
//PINS_DRV_WritePin(ENABLE_BL_GPIO, ENABLE_BL_PIN, 1); // Enable Backlit PTE7
//PINS_DRV_WritePin(ENABLE_LCD_GPIO, ENABLE_LCD_PIN, 1); // Backlit PWM PTB12

return;
}

 

 

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Robin_Shen
NXP TechSupport
NXP TechSupport

Can you use CLOCK_DRV_Init instead of CLOCK_SYS_Init?

CLOCK_SYS_Init CLOCK_DRV_Init.png

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3,421 Views
John64
Contributor I

Dear Robin, 

  Could you please provide the S32K1 SDK4.03 executable file(.exe) to Twokey? or attachment in here.  

Best Regard, 

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3,399 Views
Robin_Shen
NXP TechSupport
NXP TechSupport

You may need to update it in S32DS v3.4, please refer to How to connect SDK Version 4.0.3 to S32DS

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