S32K3 Hardware Watchdog

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K3 Hardware Watchdog

Jump to solution
1,428 Views
rexoplans
Contributor III

Does the S32K3 series microcontrollers have hardware timers or software timers? Or is the term SWT only used as a naming convention and referred to as software in name only? 

Tags (1)
0 Kudos
Reply
1 Solution
1,382 Views
Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Thanks for your feedback.

As for software-wise or hardware-wise, are you referring as if you should be able to see the external reset signal being asserted?

Under the S32K3 reset sequences there are 3 types:

  • Power-ON Reset (POR)
  • Destructive Reset
  • Functional Reset

From the 3 types, the SWT module will generate a Functional Reset which is described as [Page 1205, S32K3xx Reference Manual, Rev. 6, 04/2023]:

"Leads all the communication peripherals and cores to reset. The communication protocols' sanity
is not guaranteed and they are assumed to be reinitialized after reset. The SRAM content, and
the functionality of certain modules, is preserved across functional reset."

As for the RESET_b pin, the following is described [Page 1222, S32K3xx Reference Manual, Rev. 6, 04/2023]:

"The RESET_b pin offers the following uses if you configure it for the reset functionality:

  • Acts as an external destructive reset source
  •  Acts as an indicator for the chip reset sequence for both functional and destructive reset sequences "

We may again be misunderstanding your request, if so we apologize.

Please, let us know.

View solution in original post

0 Kudos
Reply
3 Replies
1,398 Views
Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Looking at the title and from your question, we assume you are asking the following:

"Does the S32K3 series microcontrollers have watchdog hardware timers or watchdog software timers?"

If so, as you are implying, it is a naming convention. Since the SWT has registers that need configurations, it is a module embedded inside the MCU itself that requires an initialization [Page 2749, Chapter 67.5, S32K3xx Reference Manual, Rev. 6, 04/2023]. This can also be seen under the SWT Block Diagram [Page 2747, S32K3xx Reference Manual, Rev. 6, 04/2023]:

DanielAguirre_0-1694452584378.png

Please, let us know.

0 Kudos
Reply
1,395 Views
rexoplans
Contributor III
"I actually couldn't explain the topic that confuses me exactly. Hardware-wise, I believe there is a Watchdog module, but when I tinkered with it a bit, it seemed to be just a timer. When the timeout value is reached, will the process of resetting the processor be done hardware-wise or software-wise?
0 Kudos
Reply
1,383 Views
Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Thanks for your feedback.

As for software-wise or hardware-wise, are you referring as if you should be able to see the external reset signal being asserted?

Under the S32K3 reset sequences there are 3 types:

  • Power-ON Reset (POR)
  • Destructive Reset
  • Functional Reset

From the 3 types, the SWT module will generate a Functional Reset which is described as [Page 1205, S32K3xx Reference Manual, Rev. 6, 04/2023]:

"Leads all the communication peripherals and cores to reset. The communication protocols' sanity
is not guaranteed and they are assumed to be reinitialized after reset. The SRAM content, and
the functionality of certain modules, is preserved across functional reset."

As for the RESET_b pin, the following is described [Page 1222, S32K3xx Reference Manual, Rev. 6, 04/2023]:

"The RESET_b pin offers the following uses if you configure it for the reset functionality:

  • Acts as an external destructive reset source
  •  Acts as an indicator for the chip reset sequence for both functional and destructive reset sequences "

We may again be misunderstanding your request, if so we apologize.

Please, let us know.

0 Kudos
Reply