Does the S32K3 series microcontrollers have hardware timers or software timers? Or is the term SWT only used as a naming convention and referred to as software in name only?
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Hi,
Thanks for your feedback.
As for software-wise or hardware-wise, are you referring as if you should be able to see the external reset signal being asserted?
Under the S32K3 reset sequences there are 3 types:
From the 3 types, the SWT module will generate a Functional Reset which is described as [Page 1205, S32K3xx Reference Manual, Rev. 6, 04/2023]:
"Leads all the communication peripherals and cores to reset. The communication protocols' sanity
is not guaranteed and they are assumed to be reinitialized after reset. The SRAM content, and
the functionality of certain modules, is preserved across functional reset."
As for the RESET_b pin, the following is described [Page 1222, S32K3xx Reference Manual, Rev. 6, 04/2023]:
"The RESET_b pin offers the following uses if you configure it for the reset functionality:
We may again be misunderstanding your request, if so we apologize.
Please, let us know.
Hi,
Looking at the title and from your question, we assume you are asking the following:
"Does the S32K3 series microcontrollers have watchdog hardware timers or watchdog software timers?"
If so, as you are implying, it is a naming convention. Since the SWT has registers that need configurations, it is a module embedded inside the MCU itself that requires an initialization [Page 2749, Chapter 67.5, S32K3xx Reference Manual, Rev. 6, 04/2023]. This can also be seen under the SWT Block Diagram [Page 2747, S32K3xx Reference Manual, Rev. 6, 04/2023]:
Please, let us know.
Hi,
Thanks for your feedback.
As for software-wise or hardware-wise, are you referring as if you should be able to see the external reset signal being asserted?
Under the S32K3 reset sequences there are 3 types:
From the 3 types, the SWT module will generate a Functional Reset which is described as [Page 1205, S32K3xx Reference Manual, Rev. 6, 04/2023]:
"Leads all the communication peripherals and cores to reset. The communication protocols' sanity
is not guaranteed and they are assumed to be reinitialized after reset. The SRAM content, and
the functionality of certain modules, is preserved across functional reset."
As for the RESET_b pin, the following is described [Page 1222, S32K3xx Reference Manual, Rev. 6, 04/2023]:
"The RESET_b pin offers the following uses if you configure it for the reset functionality:
We may again be misunderstanding your request, if so we apologize.
Please, let us know.