S32K148 - ENET TMRn init

[jakub_mielczare]

Hello,

What is the correct sequence to properly initialize ENET TMR0 (also 1,2,3) to for capture mode on rising edge? I need pin muxing and ENET register setup sequence with correct values.

Also what is the minimum and maximum frequency of the signal that the timers can work with? What are the values of rise/fall/hold times?

Thank you,

Jakub

[nxp52415]

Hello All,

I followed up here with Jakub and the issue he was having seems to be resolved now.

After reviewing Jakub's code, I found that MUX setting for PTE9, which was intended as an "input capture" for ENET 1588 Timer, was set to 4. In the table below extracted from reference manual we can see the intended setting should be 5:

PTE9	PCR_PTE9	0000_0000	DISABLED		Signal Path Disabled
		0000_0001	PTE9	PTE	Port E I/O
		0000_0010	FTM0_CH7	FTM0	FTM Channel
		0000_0011	LPUART2_CTS	LPUART2	Clear To Send (bar)
		0000_0101	ENET_TMR3	ENET	ENET 1588 Timer Channel

Confussion on customer site came from the fact that there is no continuity on the values of the table. i.e. it jumps from 3 to 5.

Regards

[veronicavelciu]

Hello Jakub,

I recommend using S32 Design Studio for ARM together with the S32 SDK. You can start from the enet_loopback example and you will be able to configure the pins and the ENET timer through the graphical interface. In order to enable the timer channel, you will need to add the following code sequence:

ENET_DRV_TimerInit(INST_ETHERNET1, &ethernet1_TimerInitConfig);
ENET_DRV_TimerEnableChannel(INST_ETHERNET1, 0U, &ethernet1_ChannelInitConfig0);
ENET_DRV_TimerStart(INST_ETHERNET1);

You should be able to use the Timer 0 channel on the S32K148 evaluation board.

Best regards,

Veronica

[jakub_mielczare]

One more question: is it possible to test ENET timer capture mode on S32K148 evaluation board (S32K148EVB-Q176)?

[jakub_mielczare]

Hello,

Can anyone answer, please? This is urgent.

Thanks,

Jakub