Hello there,
I meet the following error when i download the S32K146 MCAL project in IAR.
Thu Aug 10, 2023 10:46:20: IAR Embedded Workbench 9.32.1 (C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm\bin\armPROC.dll)
Thu Aug 10, 2023 10:46:20: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm/config/debugger/NXP/KE1xF.dmac
Thu Aug 10, 2023 10:46:20: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm/config/debugger/NXP/S32K14x_trace.dmac
Thu Aug 10, 2023 10:46:20: Flash download warning: 1636 out of 1636 bytes from data record CODE:[0x1fff'1380,0x1fff'19e3] will not be flashed
Thu Aug 10, 2023 10:46:20: There were warnings while generating flash loader input.
Thu Aug 10, 2023 10:46:20: See the Debug Log window for details.
Thu Aug 10, 2023 10:46:22: Loaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm/config/flashloader/NXP/FlashS32Kxxx.mac
Thu Aug 10, 2023 10:46:22: JLINK command: ProjectFile = C:\test_case\AUTOSAR\code\adwfs81218-autosar\TEST\settings\test_Debug.jlink, return = 0
Thu Aug 10, 2023 10:46:22: Device "S32K146" selected.
Thu Aug 10, 2023 10:46:22: DLL version: V7.88n, compiled Jul 26 2023 15:38:22
Thu Aug 10, 2023 10:46:22: Firmware: J-Link V9 compiled May 7 2021 16:26:12
Thu Aug 10, 2023 10:46:22: Selecting SWD as current target interface.
Thu Aug 10, 2023 10:46:22: JTAG speed is initially set to: 1000 kHz
Thu Aug 10, 2023 10:46:22: InitTarget() start
Thu Aug 10, 2023 10:46:22: SWD selected. Executing JTAG -> SWD switching sequence.
Thu Aug 10, 2023 10:46:22: InitTarget() end - Took 61.4ms
Thu Aug 10, 2023 10:46:22: Found SW-DP with ID 0x2BA01477
Thu Aug 10, 2023 10:46:22: DPIDR: 0x2BA01477
Thu Aug 10, 2023 10:46:22: CoreSight SoC-400 or earlier
Thu Aug 10, 2023 10:46:22: Scanning AP map to find all available APs
Thu Aug 10, 2023 10:46:22: AP[2]: Stopped AP scan as end of AP map has been reached
Thu Aug 10, 2023 10:46:22: AP[0]: AHB-AP (IDR: 0x24770011)
Thu Aug 10, 2023 10:46:22: AP[1]: JTAG-AP (IDR: 0x001C0000)
Thu Aug 10, 2023 10:46:22: Iterating through AP map to find AHB-AP to use
Thu Aug 10, 2023 10:46:22: AP[0]: Core found
Thu Aug 10, 2023 10:46:22: AP[0]: AHB-AP ROM base: 0xE00FF000
Thu Aug 10, 2023 10:46:22: CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Thu Aug 10, 2023 10:46:22: Found Cortex-M4 r0p1, Little endian.
Thu Aug 10, 2023 10:46:22: FPUnit: 6 code (BP) slots and 2 literal slots
Thu Aug 10, 2023 10:46:22: CoreSight components:
Thu Aug 10, 2023 10:46:22: ROMTbl[0] @ E00FF000
Thu Aug 10, 2023 10:46:22: [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
Thu Aug 10, 2023 10:46:22: [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
Thu Aug 10, 2023 10:46:22: [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
Thu Aug 10, 2023 10:46:22: [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
Thu Aug 10, 2023 10:46:22: [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
Thu Aug 10, 2023 10:46:22: Initializing 126976 bytes work RAM @ 0x1FFF0000
Thu Aug 10, 2023 10:46:22: Reset: Halt core after reset via DEMCR.VC_CORERESET.
Thu Aug 10, 2023 10:46:22: Reset: Reset device via AIRCR.SYSRESETREQ.
Thu Aug 10, 2023 10:46:24: Reset: Halt core after reset via DEMCR.VC_CORERESET.
Thu Aug 10, 2023 10:46:24: Reset: Reset device via AIRCR.SYSRESETREQ.
Thu Aug 10, 2023 10:46:24: Hardware reset with strategy 0 was performed
Thu Aug 10, 2023 10:46:24: Initial reset was performed
Thu Aug 10, 2023 10:46:24: DMAC: Disable watchdog ...
Thu Aug 10, 2023 10:46:24: ----- Prepare hardware for Flashloader -----
Thu Aug 10, 2023 10:46:25: Loaded debugee: C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm/config/flashloader/NXP/FlashS32K148RAM60K.out
Thu Aug 10, 2023 10:46:25: Target reset
Thu Aug 10, 2023 10:46:25: ----- Flush Caches -----
Thu Aug 10, 2023 10:46:25: Unloaded macro file: C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm/config/flashloader/NXP/FlashS32Kxxx.mac
Thu Aug 10, 2023 10:46:25: Downloaded C:\test_case\AUTOSAR\code\adwfs81218-autosar\TEST\Debug\Exe\test.out to flash memory.
Thu Aug 10, 2023 10:46:25: 37868 bytes downloaded into FLASH (6.90 Kbytes/sec)
Thu Aug 10, 2023 10:46:26: Loaded debugee: C:\test_case\AUTOSAR\code\adwfs81218-autosar\TEST\Debug\Exe\test.out
Thu Aug 10, 2023 10:46:26: Reset: Halt core after reset via DEMCR.VC_CORERESET.
Thu Aug 10, 2023 10:46:26: Reset: Reset device via AIRCR.SYSRESETREQ.
Thu Aug 10, 2023 10:46:26: Hardware reset with strategy 0 was performed
Thu Aug 10, 2023 10:46:26: Download completed.
Thu Aug 10, 2023 10:46:26: Reset: Halt core after reset via DEMCR.VC_CORERESET.
Thu Aug 10, 2023 10:46:26: Reset: Reset device via AIRCR.SYSRESETREQ.
Thu Aug 10, 2023 10:46:26: Software reset was performed
Thu Aug 10, 2023 10:46:26: Target reset
Thu Aug 10, 2023 10:46:26: DMAC: Disable watchdog ...
Thu Aug 10, 2023 10:46:26: There were 1 error and 1 warning during the initialization of the debugging session.
Thu Aug 10, 2023 10:47:41: HardFault exception.
Thu Aug 10, 2023 10:47:41: The processor has escalated a configurable-priority exception to HardFault.
Thu Aug 10, 2023 10:47:41:
Thu Aug 10, 2023 10:47:41: An imprecise data access error has occurred (CFSR.IMPRECISERR, BFAR).
Thu Aug 10, 2023 10:47:41:
Thu Aug 10, 2023 10:47:41: A derived bus fault has occurred on exception entry (CFSR.STKERR, BFAR).
Thu Aug 10, 2023 10:47:41:
Thu Aug 10, 2023 10:47:41: Could not determine the location where the exception occurred.
Thu Aug 10, 2023 10:47:41:
Thu Aug 10, 2023 10:47:41: See the call stack for more information.
Thu Aug 10, 2023 10:47:43: IAR Embedded Workbench 9.32.1 (C:\Program Files\IAR Systems\Embedded Workbench 9.1\arm\bin\armPROC.dll)
Thu Aug 10, 2023 10:47:43: Loading the J-Link Driver driver
Reproduce enviroment:
1. I'm using the SW32K1_RTD_4.4_1.0.1_HF01 MCAL source code
2. the linker file is inside the directory: SW32K1_RTD_4.4_1.0.1_HF01\eclipse\plugins\Platform_TS_T40D2M10I1R0\build_files\iar\linker_flash_s32k146.icf.
3. There is nothing in my main code only some init steps:
int main(void)
{
/* Write your code here */
Mcu_Init(NULL_PTR);
Mcu_InitClock(McuClockSettingConfig_0);
while (MCU_PLL_LOCKED != Mcu_GetPllStatus());
Mcu_DistributePllClock();
Mcu_SetMode(McuModeSettingConf_0);
ResumeAllInterrupts();
Port_Init( NULL_PTR );
Platform_Init( NULL_PTR );
Dio_WriteChannel(DioConf_DioChannel_EN_LOCK_MCU, STD_HIGH);
Spi_Init( NULL_PTR );
Gpt_Init(&Gpt_Config_VS_0);
Gpt_StartTimer(GptConf_GptChannelConfiguration_GptChannelConfiguration_0, 10*20000000/1000);
Gpt_EnableNotification(0u);
int32_t err = 0;
return err;
}
Could someone help me solve this issue? Or could someone give me an IAR project on s32k146 that using the MCAL source code as an example? I can not even run into the RESET_HANDLER in assembly and always get to the HardFault_Handler.
Thanks in advance!
