S32K144/S32K311 IIC

[kentsun]

Could you help to tell if the Nxp S32K1 or S32K3 family have such abilities for I2C peripheral?

The I2C bus error shall be detected when the SDA line is changing (from level “HIGH” to “LOW”, or “LOW” to “HIGH”) when SCL line is at level “HIGH”.

[kentsun]

This request is from our customer, and they ask for compliance check if TM can make it or not.

Per your feedback we will fill it as ‘compliant’ , meaning TM can meet this requirement, by utilizing to read the flag of ‘MSR[ALF]’ .

This requirement will be tested in particularly as customer needs test report, and test case will be to simulate 2 signal of SDA and SCL, by wave shape below, by one wrong I2C SDA and SCL arrangement.

I want to know  if in such case MSR[ALF] will be set or not.

[danielmartynek]

Hi @kentsun,

The S32K LPI2C Master device must be sending a frame.

During this time, the SDA line can be driven externally to disturb the signal from the LPI2C.

Once the LPI2C detects a different logic level at SDA, the ALF flag is set, which can be a source of LPI2C interrupt.

Regards,

Daniel

[kentsun]

and what about if we are slave but not master.

In this case, can the slave LPI2C detects and set ALF flag, if SDA line is driven externally and disturbed.

[danielmartynek]

Hi @kentsun,

The MSR[ALF] is a status flag of the master.

There is SSR[BEF] flag instead

Regards,

Daniel

[danielmartynek]

Hi @kentsun,

This is the arbitration process:

UM10204 I2C-bus specification and user manual

https://assets.nexperia.com/documents/user-manual/UM10204.pdf

Yes, the LPI2C module on both the S32K1xx and S32K3xx can detect arbitration loss.

When the arbitration is lost the MSR[ALF] flag is set.

Regards,

Daniel

[kentsun]

This request is from our customer, and they ask for compliance check if TM can make it or not. Per your feedback we will fill it as ‘compliant’ , meaning TM can meet this requirement, by utilizing to read the flag of ‘MSR[ALF]’ . This requirement will be tested in particularly as customer needs test report, and test case will be to simulate 2 signal of SDA and SCL, by wave shape below, by one wrong I2C SDA and SCL arrangement. checking if in such case MSR[ALF] will be set or not?