Hello,
The "SIM->CHIPCTL |= SIM_CHIPCTL_CLKOUTSEL(8); " means that you have chosen the SPLLDIV2_CLK option as CLKOUT.
However, the Phase-locked loop (PLL) is not available for the S32K11x product series.
I would like to point you to the Reference Manual rev 9. section "27.2 High level clocking diagram" note number 3.
"3. For S32K11x, inputs and muxes connected to PCC are Reserved. Also, SPLLDIVx_CLK are Reserved as indicated in RED"
Best Regards,
Diana
Thanks for your suggestion!