Reset pin stays low on S32K144

[abhineet]

I have made a custom board with S32K144. When trying to boot it, the JTAG is unable to connect to the MCU.

On further inspection, turned out that the RESET pin is being pulled down by the MCU (It is connected to 5V through a 10K, but the controller is pulling it down). The voltage at RESET pin is mere 0.07 V. 

When I inspected the Reset pin with an oscilloscope, it had a repetitive spike at every 125µs (Image attached).

Is there anyone else who faced a similar issue and have managed to fix it?

[marsimrom1]

Hi!

I have the same problem but I debugg with OpenSDA USB and PEMicro.

Anybody know how to fix it?

[klau]

Hi Lukas,

We have found a fix for this issue.

Thanks,

Kevin

[myna]

Hello. kevinlau

I have also the same problem.

Could you tell me how to fix this problem?

Thank you.

MinYeop.

[klau]

Hi MinYeop,

I entered this line "monitor reset" to the debugger's startup tap.

Thanks,

Kevin

[lukaszadrapa]

Hi,

this looks like typical reset signal when the flash memory is blank. Once the internal reset sequence is finished, reset is released, the core reads reset vector address and jumps to this address. Because the flash is blank, there's address 0xFFFFFFFF, so it executes some garbage and reset is triggered again. And the same sequence is repeated. So, it's expected behavior.

But JTAG should be able to enter debug mode anyway. What kind of JTAG device do you use? I have no problem with this scenario when using Lauterbach or PEmicro.

Regards,

Lukas

[klau]

Hi Lukas,

Our hardware engineer reports that we are experiencing the same issue. And I have a J-Link JTAG and S32 Design Studio "S32DS_ARM_Win32_v2018.R1_b180326".

Is there any workaround in my above mentioned setup?

Thanks,

Kevin

[leeyuleeyu]

Abhineet Tomar   

   Have you solved your problem?How to solve it, now I also have the same problem, the j-link can detect, is the reset is abnormal.