Questions About the erase and program DFLASH

[赵子成]

Hi Guys, I have several questions about S32K144 Dflash erase and program operation:

1、Is it necessary to disable all the interrupt before erase and program the DFLASH,? or it will lead to abnormal result (even the FLASH_DRV_EraseSector result is STATUS_SUCCESS)?

2、When I use PE and S32DS software to debug the DFLASH erase and program, Looking on the DFLASH address, It happened that run the FLASH_DRV_EraseSector function but the concern sector data is not 0xFF, is it possible the S32DS can't show the right DFLASH address data?

3、We now update the software and add the DFLASH emulated EEPROM function, but the first time from the old software to the updated software will lead to the reset when run the partition function FLASH_DRV_DEFlashPartition, I don't know why.

Can someone answer my issues?

Thanks.

[danielmartynek]

Hi,

1. It depends on where the vector table and the interrupt routines are located.

Because simultaneous programming and reading is not allowed on the same flash block.

Please refer to the RM rev.11 Section 36.5.9.4 Allowed simultaneous flash operations.

2-3.

Do you read the Dflash address by a pointer or in the memory view? 

Please use the flash_partitioning_s32k144 SDK example.

Could you share a simple test project that would demonstrate the issue?

Thanks,

BR, Daniel

[赵子成]

Hi Daniel,

 I read the Dflash address by a pointer and  in the memory view, both are the same-----not 0xFF.

Before I use FLASH_DRV_DEFlashPartition, I must use INT_SYS_DisableIRQGlobal, I don't know why.

Is the operatin of INT_SYS_DisableIRQGlobal equal to disable all the interrupt? Like INT_SYS_DisableIRQGlobal = LPIT_DRV_DisableTimerChannelInterrupt + FLEXCAN_SetMsgBuffIntCmd(pstCanBase, i, FALSE)+..........?

I have shared a project.

When exec the DFA_SaveParaData(WR_DFLASH_PAR_ALARM_F_HALF, &g_unParData), you can see not all the sector data become 0xFF in address 0x2000_7800 after exec FLASH_DRV_EraseSector in line 250 in DFA.c.

Thanks.

[danielmartynek]

Hi,

Please see the below code, it masks interrupts globally.

When a peripheral interrupt is triggered while the interrupts are masked globally, the interrupt request becomes pending (NVIC_ISPR) until ENABLE_INTERRUPTS() is called.

There a typo in the address, right? 0x1000_7800

Please read SIM_FCFG1_DEPART to see if it is partitioned.

And the FTFC error bits after each FTFC operation: FTFC_FSTAT[ACCERR, FPVIOL, MGSTAT].

Thanks,

BR, Daniel

[赵子成]

Hi Daniel,

No typo in the address 0x10007800, I use S32K144, the DFLASH size is 64K types, and DFLASH start address is 0x10000000.

As you can see in the code----FLASH_DRV_DEFlashPartition, Config the DFLASH size is 32K Bytes, FEE size is 4K Bytes.0x10007800 is within the DFLASH address(EEPROM backup is also 32K bytes)

No error after FTFC operation--------return STATUS_SUCCESS, but the result is not OK.

[danielmartynek]

Hi 赵子成 ,

Thank you for clarification, you actually wrote: "... sector data become 0xFF in address 0x2000_7800 after ...".

I have problems to compile the project and it requires some debugging.

What is the SIM_FCFG1_DEPART value? Can you share the content of FCCOB0 - FCCOBB before the command is launched and the memory view after the erase sector operation. Could you disable the DFlash prefetch buffer OCMDR1[OCM1]?

Thanks,

BR, Daniel