Hi,
I need to trigger the adc1 Hw unit which need to be in hardware triggered by ftm0(pwm). The adc conversion has to be triggered at the midpoint of ON period of PWM output. I'm using 2 pwm signals which are left and right aligned(ftm0_ch0 and ftm0_ch2).
Can you help how to configure for the above combination.
you can refer to the demo in the attachment,this demo test on S32 DS V3.4 and SDK Version is RTM 4.0.2.
for you better understanding , you can take a look at the decument AN13000,Figure 16.
https://www.nxp.com/search?keyword=AN13000&start=0
Hi@Senlent
In my eb tresos their is no provision for configuring the pdb pretriggers, since I need to trigger the adc conversion at the mid of ON time period of the pwm signal. Also I need to know how this pretriggers values are configured( in my case I need the pretrigger to be at the 50% of the active pwm pulse).
I only see the trgmux logic group configuration in the mcl module where I can configure the trgmux_inout mapping like the trig source and the target module.