在使用这个Enhanced Fifo时启用了DMA,按照如下做初始化
IntCtrl_Ip_EnableIrq(FlexCAN0_1_IRQn);
IntCtrl_Ip_InstallHandler(FlexCAN0_1_IRQn, CAN0_ORED_0_31_MB_IRQHandler, NULL_PTR);
IntCtrl_Ip_EnableIrq(DMATCD0_IRQn);
IntCtrl_Ip_InstallHandler(DMATCD0_IRQn, Dma0_Ch0_IRQHandler, NULL_PTR);
Dma_Ip_Init(&Dma_Ip_xDmaInitPB);
FlexCAN_Ip_Init(INST_FLEXCAN_0, &FlexCAN_State0, &FlexCAN_Config0);
FlexCAN_Ip_ConfigEnhancedRxFifo_Privileged(INST_FLEXCAN_0,&CAN_EnhancedFIFo_FilterTable[0]);
FlexCAN_Ip_SetStartMode(INST_FLEXCAN_0);
FlexCAN_Ip_RxFifo(INST_FLEXCAN_0,&FifoRXData1);
在第一次中断时void Can0_MB_RXTX_Callback(uint8 instance, Flexcan_Ip_EventType eventType,
uint32 buffIdx, const Flexcan_Ip_StateType * flexcanState)
{
switch(eventType)
{
case FLEXCAN_EVENT_DMA_COMPLETE:
FlexCAN_Ip_RxFifo(INST_FLEXCAN_0,&FifoRXData1);
break;
default:
break;
}
在我的FifoRXData1缓存中能够正确得缓存接收到得帧,而后续发送得数据进入中断则 buff里面得数据并未得到更新。
Hi,
if you get into an DMA interrupt/event for each received message but your buffer is not updated, then this can be caused by data cache. Be sure your buffer is placed in non cacheable area if cache enabled. You can try to use below
__attribute__(( aligned(32) )) Flexcan_Ip_MsgBuffType FifoRXData1 __attribute__ ((section (".mcal_bss_no_cacheable")));
BR, Petr
。