S32G399 SGMII/PCIe SerDes Configuration

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S32G399 SGMII/PCIe SerDes Configuration

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Lmckeehan
Contributor I

Hi, 

 

We are trying to understand the SerDes muxing and configurations. Specifically

  • how many SGMII lanes are supported when 1x PCIe lane is used
  • is it possible to have all of the PFE MACs run on SGMII with one PCIe Lane
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chenyin_h
NXP Employee
NXP Employee

Hello, @Lmckeehan

Thanks for the questions

  1. There are in total 4 lanes, if 1 lane used for PCIe(X1), then 3 lanes left could be configured as SGMII.
  2. From the S32G3RM, in chapter 53, there are table405/406 showing the different working modes on serdes0/1 with various combination, According to the tables, it is possible to have all of the PFE MACs run on SGMII with one PCIe Lane.

For example, mode2 on serdes0 + mode3 on serdes1

Hope it helps.

 

Best Regards

Chenyin

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