Hello, @Lmckeehan
Thanks for the questions
- There are in total 4 lanes, if 1 lane used for PCIe(X1), then 3 lanes left could be configured as SGMII.
- From the S32G3RM, in chapter 53, there are table405/406 showing the different working modes on serdes0/1 with various combination, According to the tables, it is possible to have all of the PFE MACs run on SGMII with one PCIe Lane.
For example, mode2 on serdes0 + mode3 on serdes1
Hope it helps.
Best Regards
Chenyin