Hi,
We would like to use QSPI flash from both M7 & A53, both core having it's own memory regions, is this scenario currently supported by the driver?
If so, are there any reference or example we could look into? Do we need to implement semaphore or other synchronization mechanism in application?
Our board is S32G274A VNP_RDB2, software is RTD3.0.2 for M7, and BSP33 HF1 for A53.
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Hi,
Thanks for your feedback.
The RTD is mainly focused under the M7 core usage, for which we expect that the features you are referring to are M7 only.
For communicating both M7 and A53, IPCF is the recommended way. We don't see any special configuration for the flash usage under BSP User Manual.
Please, let us know.
Hi,
The following is said from our internal team:
"There is no limitation on external QSPI/eMMC accessibility from either A53 or M7. The application on it's part can impose these restrictions based on their use case."
As for examples, we are not seeing anything available, since this will imply the usage of a multicore application. All examples (at the exception of AN13750 and IPCF) are single core ones. We do apologize.
Please, let us know.
Thanks for the reply,
I've read the Fls manuals packed in RTD, it mentioned that there are some configuration options in tresos for multicore usage, and there are semaphores maintained by the flash driver if configured.
My question is actually this: Does this multicore feature support A53-M7 usage, or only applied when using multiple M7 cores? Does BSP also support some kind of multicore configuration too?
Hi,
Thanks for your feedback.
The RTD is mainly focused under the M7 core usage, for which we expect that the features you are referring to are M7 only.
For communicating both M7 and A53, IPCF is the recommended way. We don't see any special configuration for the flash usage under BSP User Manual.
Please, let us know.