S32G2 bootROM QSPI reconfiguration data for mt35x micron SPI nor flash

[gse31]

Hi,

We have a custom board with S32G2 and MT35XU512ABA1G12-0SIT (micron octal SPI flash) connected to port A.

We are trying to boot from this memory.

We followed this application note : S32G_QSPI_NOR_20211125_V3.pdf. In chenese, unfortunately, but QSPI reconfiguration data are provided for MT35XU256ABA1G12-0AAT, quite similar to our:

LUT@0x244 (from flash base address 0), DDR ocal fast io read sequence (flash cmd 0xfd)
0x47fd
0x4702
0x2b20
0x0f14
0x3b10
0x0000
FLASH_WRITE_DATA@0x384: (change mode to octal DDR)
0x00000006 0x00000000 0x00000000
0x81600081 0x00000000 0x000000E7

This reconfiguration data does not work on our board. This leads to some QSPI transfers from bootROM after powerup, followed by a reset, 8 times, and S32G2 restarts in serial mode.

Flashing the same binary into RDB2 board MX25U512 flash memory, and it boots without issue (ATF/uboot trace on uart0).

We tried others configurations, without success (removing the page program instruction from LUT read sequence, why is it there?):
0x47fd
0x2b20
0x0f14
0x3b10
0x0000

Do you have QSPI reconfiguration data (bin file like the ones in eclipse\mcu_data\processors\S32G274A_Rev2\PlatformSDK_S32XX_2022_03\quadspi\default_boot_images) for Micron flash memories?

Do you know if the reconfiguration data for Micron mt35x indicated in S32G_QSPI_NOR_20211125_V3.pdf have been tested ?

Thanks for your help.

[Daniel-Aguirre]

Hi,

The only configuration that seems to be validated by NXP itself is the one related to the embedded Macronix Flash Memory available on the NXP development boards. We do apologize.

As for additional QSPI configurations, there is an Application Note (AN13563) which describes the re-configuration parameters that can be implemented by BootROM with the embedded Macronix part. Aside from this, there is no other documentation available on this topic.

We can recommend sending this inquiry to your local NXP FAE, since they could be able to provide more information on this regard.

Please, let us know.