S32K312 PWM Generation issue

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S32K312 PWM Generation issue

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NITHYANANTHVS
Contributor II

Hi Team,

@Senlent 

I've loaded PWM generation example code for s32k312 and tested. It was working as expected.

The example code versions are below and also please find the attached screen shots

Version 3.5
SDK 2.0.0 


I Created a new application project using below configuration.
Version 3.5
SDK 3.0.0 

Here, it is not working as expected.


If I configure one channel it was working and we could able to see the correct frequency & duty cycles in the scope, but if I configure more than one channel, the last one only working as expected. The first two channels are not working.   

Emios_Pwm_Ip_SetDutyCycle is disabled in generated code.

Please guide here if someone is aware of it.

 

NITHYANANTHVS_2-1711454958811.pngNITHYANANTHVS_3-1711454965642.png

NITHYANANTHVS_4-1711454974717.pngNITHYANANTHVS_5-1711454981173.png



 

Thank you

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1,187 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@NITHYANANTHVS

you can have a try the demo in the attachment.

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1,134 Views
NITHYANANTHVS
Contributor II

Hi @Senlent 

Thank you for your continuous support!

We were tested your example code. We are using this configuration, but we can't be able to achieve the result.  

It is not working as expected. If I configure one channel it was working and we could able to see the correct frequency & duty cycles in the scope, but if I configure more than one channel, the last one only working as expected. The first two channels are not working. Please guide here if someone is aware of it.   

IDE Version - 3.5

SDK version - 3.0.0

If I call continuously in IDE version 2.0.0, it is working as expected.

Thank you

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1,074 Views
NITHYANANTHVS
Contributor II

Hi @Senlent 

 

NITHYANANTHVS_0-1712569127251.png

Here we were configuring PWM output for three channels. For Duty cycle they are configuring with channel id. Eg: Emios_Pwm_Ip_SetDutyCycle(INSTANCE_0, 0U, 6750);

But for period they didn't configure for each channel. Could you explain the following queries.

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1,070 Views
Senlent
NXP TechSupport
NXP TechSupport

Please provide me with your project and I will help you test it.

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1,067 Views
NITHYANANTHVS
Contributor II

Hi @Senlent 

Thank you for your support!

I couldn't be able to provide you a project. Because it causes violation for me.

 I'm configuring in 2.0.0 SDK version it was working fine as expected, but one problem in 2.0.0 SDK version, we couldn't be able to generate ADC pins. It is not reflecting in board -> Siul2_Port_Ip_Cfg.c file. (Pin list only generated, array of pin configuration structure not generated)

Is there any other solution for this problem or i need to install any other packages for 2.0.0 SDK version for ADC pin generation.

Awaiting for your response.

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1,124 Views
Senlent
NXP TechSupport
NXP TechSupport

Hi@NITHYANANTHVS

please provide your project.

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