TEST pin on HCS12

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TEST pin on HCS12

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AndyUK
Contributor I
Hi all,
 
I know that the spec for the TEST pin on the HCS12xx says that the pin MUST be tied to gnd - but what could happen if it isn't ??
 
The reason for asking this is as follows. We have had some units out in the field that have passed all our normal test procedures, but a few months later have been having 'odd faults' - none of which we could really put our finger on. Then we noticed that a mistake has been made on the PCB, and the TEST pin has been left floating.
 
The two may not be related at all - I'm just exploring the possibility.
 
Does anyone know what happens in this case ?
 
Thanks
 
Andy
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Steve
NXP Employee
NXP Employee
As the name suggests the TEST pin is used for our production test process and the part's behaviour is affected by the state of this pin. I can't say that this is the root of your "odd faults" but for sure there is a strong possibility that it is at least a contributing factor.
On S12X devices this pin has an internal pull down resistor.
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AndyUK
Contributor I
Hi Steve,
 
When you say 'the parts behaviour is affected by the state of this pin' can you elaborate at all ?  For example is it only read at Reset, or is at active all the time ?
 
Thanks
 
Andy
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Steve
NXP Employee
NXP Employee
Andy, this varies a bit from product to product so please assume that this pin is active all the time.
This is why the advice to connect this pin to VSS remains even on the designs where we have a internal pull down.
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AndyUK
Contributor I
Hi Steve,
 
Thanks for your time on this. To give you a bit more info....
 
Our design originally used the 9S12DP256B, which went obselete, so we moved over to the 9S12DP512 (mask 4L00M)
 
We haven't had any problems with the 256 design, despite the TEST pin being left floating. We do seem to be getting problems with the 512 though - on exactly the same PCB.
 
The main problem seems to be that the application doesn't always start after a RESET - could this be as a result of the TEST pin being in an unknown state ? Is the action of the pin changed from the 256 to the 512 ?
 
If the floating TEST pin can be attributed as the cause of this problem, then I know we have a fix. My worry is that it's some other change that I've not found yet.
 
Thanks once again
 
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Steve
NXP Employee
NXP Employee
Andy, anything around the behaviour of a floating input pin really puts us into the the realm of speculation because we don't know what the dominant factors are and how they change with environmental changes. The action of the pin is not changed but since there are more on-chip modules on the 512 potentially more of the chip's features may be affected by the behaviour of the test pin. Whether this affects your application will depend on your application software, hardware and exactly when the pin status changes.
The behaviour of the floating pin could also be affected by the fact that the 512 die is larger but in the same package, the 512 may also have some process improvements that affect the behaviour of the pin e.g. a reduction in pin leakage will affect how likely it is to float high. Depending on your volume, pin behaviour could be influenced by the batch or fab. Other factors could include changes in your flow to different solder compounds (lead-free?).
Sorry I can't be more deterministic here, but as you can see there are a great many factors involved. For sure you should terminate the TEST pin per the spec. Perhaps you can run some before and after tests to see if that has any effect?
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