Memory Protection Unit (MPU) - getting started

[Xbot]

hi,

this is my first time using MPU module. we're also using xgate code.

1. my first concern is regarding the descriptors - how do i assign descriptors for xgate code, s12code, s12 ram, xgate ram...? should both xgate and s12code be in a single descriptor as well as their RAM?

2. how do i configure the start address (ex. s12code) and end address?

3. should the EEPROM be covered?

4. is there going to a separate descriptor for the PAGED and UNPAGED memory region?

and lastly.

5. how do i monitor an access violation error from xgate or cpu?

a flow algorithm or any info is very much welcome.

[Xbot]

hi,

thanx for the reply. i have another question tho:

i am using a timer-based OS and this should probably use dynamic descriptor.

-how often do i dynamically change my descriptors? say, i want 2 descriptors to my data region and stack in a sheduled task.

-how do i do the latter? :smileyhappy:

thanks,

Message Edited by Xbot on 2008-04-14 09:46 AM

[Steve]

Change the descriptors when needed. Before each task is run you have to adjust the descriptors to suit. This would normally be done in the kernel. Remember that the kernel may need different descriptors too - depending on how you go into and out of the kernel you may need to include a descriptor to allow this to happen.

In an OS- based system you probably want to consider using the CPU User State so that tasks cannot disturb the configuration of the system. In User State the CPU has additional limitations that can help prevent accidental writing to the CCR and invalid use of the low power modes.

[Steve]

A general comment first. The MPU defines areas of memory that you are allowed to access and it is permanently enabled. By default there is a Protection Descriptor that covers all memory and all masters but as soon as you change that you need to make sure that you have all valid accesses defined.

If you are not confident with the configuration you may want to start with a very basic setup that allows the cores to execute from their respective code spaces and block execution in all data spaces - this will prevent any code runaway that occurs in data spaces. From there you can fine-tune the system to block a core from a data space that it shouldn't access and then potentially onto a dynamic system that configures the descriptors depending on what task is active at the time.

1. Descriptors are assigned in software using global addresses. The number you need and their configuration will depend entirely on your system. It may be sensible to share descriptors between different masters in some cases and not in others. Don't forget library routines, stack spaces etc.

2. Use global addresses. The actual values depend on your toolchain setup. You can get the values from your linker file or from the compiled map file. Take note of the comment in the manual about prefetches by the CPU - you don't want to trigger a violation by having the addresses set too tightly.

3. If you want to use EEPROM you must have a descriptor that covers it

4. Paging has no meaning for the MPU because it uses global addresses.

5. All violations go to the CPU and are not maskable. You have to decide what the appropriate action should be if any occur.