cpuIBCR |= 0x30; // set TX and master mode
cpuIBDR = 0x18|(adr << 1); // 0x18 = %00011[00/01]0
while((cpuIBSR & 0x02) == 0); // wait for IBIF flag to be set
I have checked the SDA line and it is always low (even on a processor reset). Is this normal? I am wondering if there is a hardware fault. I have 10K pull ups on SDA and SCL. The bus length is a few cm and there are two devices on the bus.
Hi Jon
How have you declared "cpuIBSR"?
It should be declared as "volatile" to ensure that the compiler is not optimising to read the value once and then running in the while loop with this value and never seeing that the bit has changed.
Otherwise maybe there is really a hardware problem...(?)
Regards
Mark Butcher
www.mjbc.ch