HCS12 SPI SS-line does not go low

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HCS12 SPI SS-line does not go low

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thommes
Contributor III

Hello,

 

I am interfacing an external Flash via SPI using a MC9S12D64 Controller. The SS-line has to be kept low, while reading data. So i did the following, to control the SS-Pin by myself. The Idea was:

1) pull SS low

2) SPI-Communication

3) bring SS back high

 

This is my Code:

 

void INIT_SPI()

{

DDRS |=11100000; //SS, MOSI, SCK as Outut

SPIBR = 0b00000000; // (0+1)*2^(0+1)=2

                             //=> 16MHz/2 = 8MHZ

SPICR1 = 0b01010000;

SPICR2 = 0b00000000; //SS not used by SPI

WOMS = 0;

}


After that i had expected, that when the command:

PTS = (PTS & ~0x80);

would set SS= 0 and

PTS = (PTS|0x80);

would set SS =1

 

but the SS-line stays high, whatever i do!

 

Has someone used the SPI-Interface in that way?

 

Using MOSI,MISO,SCK normal and manage the SS-line manually?

Perhaps someone has working Code, or can tell my where my mistake is?

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kef
Specialist I

DDRS |=11100000; //SS, MOSI, SCK as Outut

              ^^^^

Fix it (0b) and tell if it works.

View solution in original post

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Lundin
Senior Contributor IV

The problem is that you are using some weird, non-standard binary notation. That is a bad habit, avoid non-standard extensions and use the C language instead. You should use #defines and hex instead.

DDRS |=11100000;

Means, set DDRS to a huge decimal int number which C will implicitly truncate to 8 bits, ending up with the value 0. DDRS remains an input and thus all write attempts to PTS are futile.

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GordonD
Contributor IV

Thomas,

Managing the SS line "manually" is generally the method required by most SPI slaves. There are very few slave devices, other than perhaps shift registers, that require only an 8-bit transfer. I have used the SPI in this manner to communicate to many SPI devices. I can't really see anything incorrect in your code except that the DDR bits for MOSI and SCK don't need to be written to '1'. When the SPI is enabled and configured for master operation, this pins are automatically configured as outputs. However, this would not affect the SS line operation.

If you single step through the line that clears the SS pin, have you looked at the DDRS register at that point to ensure bit 7 is still equal to '1'? Could it be that the DDRS is being (re)initialized elsewhere in your code that makes PTS7 an input? After ensuring that DDRS7 is equal to '1', can you use the debugger memory window to write the PTS register and cause the SS line to toggle?

Best Regards,

Gordon

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kef
Specialist I

DDRS |=11100000; //SS, MOSI, SCK as Outut

              ^^^^

Fix it (0b) and tell if it works.

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GordonD
Contributor IV

Edward,

Good catch! I need to get my second cup of coffee!

Best regards,

Gordon

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