I am trying to understand the instruction timing listed in the HCS12 reference manual for the DBNE instruction. Is this an instruction where 3 cycles are required if the branch is taken and only 1 cycle if the branch is not taken? "PPP/PPO" would seem to indicate that this is not the case.
Thanks for any help someone can provide on this.
From the HCS12 CPU manual:
O —Optional program word fetch (P) if instruction is misaligned and has
an odd number of bytes of object code — otherwise, appears as
a free cycle (f); Page 2 prebyte treated as a separate 1-byte instruction
P —Program word fetch (always an aligned-word read)
The DBNE instruction will take 3 cycles whether the branch is taken or not.
I think only the normal branches have different executions times when the branch is taken/not taken.
(PPP/P)
bye