HCS12 ATD

[prog_ram]

Hello guys,

I need your help in this issue.

I am using ATD0 and ATD1 to convert several analog channels. I am also using the OC (output compare) timer function to generate a PWM (low frequency range, 0.1Hz to 100Hz with 10 to 30ms PW).

The problem is that the digital values for the analog channels are stable as long as the OC is not functioning. Once I start generating the PWM signals (two signals), the ATD0 and ATD1 digital values start to fluctuate although the analog signals are very stable (DC Sensor Outputs).

The DC analog signals are not fast, so I don't care that much about the sampling rate of the ATD or conversion time.

Here is my code for ATD0 (reading up to 4 channels):

I appreciate your help, thanks

regards,

void   OPEN_ATD0 (char con ) // con is number of channels to convert
{
 ATD0DIEN.byte= 0x00; 
 ATD0CTL2.byte=0b11000000; // power up and fast clear
 delayby25us(1);
 switch (con)
  {
   case 1 :  ATD0CTL3.byte= 0b00001000; break;   // 1 conversion always starts from AN0
   case 2 :  ATD0CTL3.byte= 0b00010000; break;   // 2 conversion
   case 3 :  ATD0CTL3.byte= 0b00011000; break;   // 3 conversion
   case 4 :  ATD0CTL3.byte= 0b00100000; break;   // 4 conversion 
   case 5 :  ATD0CTL3.byte= 0b00101000; break;   // 5 conversion 
   case 6 :  ATD0CTL3.byte= 0b00110000; break;   // 6 conversion 
   case 7 :  ATD0CTL3.byte= 0b00111000; break;   // 7 conversion 
   default:  ATD0CTL3.byte= 0x00;     // 8 conversion  
   ATD0CTL4.byte = 0b00100011; ; // 10 bit resolution 4 period 3Khz
  } 
}

// Reading function:

void   analog1_read (char ch, unsigned int analog[]) // analog[] is an unsigned int array to hold the results.
{                                                                                  // ch is number of channels to read. (same as con).
 char i=0;
 ATD0CTL5.byte=0b10110000;
 while (!(ATD0STAT0.byte&0x80));
   for (i=0;i<=ch;i++)
  {
     analog[i]= (unsigned int)*(&ATD0DR0+i);
  }
}

[allawtterb]

Have you taken a scope to these lines to see the difference when the PWM is enabled and disabled?

[prog_ram]

Yes, I have and it was solid DC voltage, no fluctuation. The PWM signals are connected to two injectors which they use a separate Power line other than the MCU power circuit. Flyback diodes are installed as well.

One thing to add is that I am using the interrupts to toggle the PWM signal. The shortest PW was 10ms, and the fastest Hz was 50HZ.

do you think it may matter if I just read each channel at a time instead of using the Multiple channels reading?

The nature of the fluctuation on the digital values is like sudden peaks, for example: if the correct digital value is 183 then it suddenly goes to 201 then back to 183 and it doesn't matter if it's low frequency or high frequency PWM. Again, the ATD0, ATD1 works fine when the PWM is off.

thank you..

Regards,

[nikosxan]

Are you using capacitors for filtering in power pins ? Also i recomend PWM outputs away from analog lines (isolation). Is there any relation to the period of the ATD 'spikes' and PWM pulse ?

what's the circuit you drive from the PWM ??

[prog_ram]

Hello Nlkosxan,
I am using capacitors for all power pins just as it's advised by Freescale. The PWM lines are away from the ATD pins and there is no relation (as I noticed) between the spikes on the digital readings and the PWM frequency.

As I said, I am using the OC to generate the PWM through interrupts, then I am driving the injectors using IPS1052G (MOSFET transistor). The inputs (0-5V OC generated signals) are very clean.

Thanks for replying and waiting for your feedback.

Regards,

[nikosxan]

I would propose a way to isolate the fault . First, take off the power drive stages (lines) that drive mosfets and see if problem persists....Then you could also try to read ATD without interrupts and see if you have any changes....

[nikosxan]

Of course take them out means just cut the PWM line driving them..........If you read ATD OK the power stage is not responsible...if not should look backwards...

[kef]

And what you see with the scope on VDDA,VSSA, VREFH and VREFL?

It shouldn't matter if you convert one channel or multiple channels. Unless maybe you have too high source impedance and capacitor at ADC pin. ADC sucks some current when sampling. So you may have different readings sampling at different rates.

You didn't say what part and what's bus clock. Your ATDCTL4 setting is for 4 to 16MHz busclock. Is this OK?

[prog_ram]

Hello Kef,
I checked VDDA, VSSA, VREFH and VREFL and they were all stable (no fluctuation) when there is PWM signal.

As for the ADC inputs, I have a low pass filter one them then an Amp-OP as isolation and protection.
I am using 16Mhz Crystal, Clock is 24Mhz.

thanks for replying and waiting for your feedback.

regards,

[allawtterb]

---

prog_ram wrote:
As for the ADC inputs, I have a low pass filter one them then an Amp-OP as isolation and protection.
I am using 16Mhz Crystal, Clock is 24Mhz.

---

If you are saying that your bus clock is 24MHz then your ATD0CTL4 settings are not proper,as noted by kef. Your currently settings put the ATDclock at 3MHz, outside of the acceptable range of 500KHz to 2MHz.  The lowest you can set the prescaler to is 5 at this frequency and the highest is 23.  

[prog_ram]

Hello guys,

I adjust the settings as you recommended, and used the following ones:

ATD1CTL4.byte = 0b00000101;

ATD1CTL5.byte=0b10010000;

for both ATD0 (4 conversions) and ATD1(3 conversions). I tested for a while and it looks like it's working even when there is PWM generation.

Now, I also did what NiKosxan asked me to do (for the PWM driving lines) and it looks like it still does the same (pikes), so I guess it's software problem. However, as I said when I changed the settings to as it's above, it worked so far.

Please review my settings.. for 24Mhz main clock rate.

thanks a lot guys, hopefully we got this solved out.

Regards,

[kef]

prog_ram wrote:

I am using 16Mhz Crystal, Clock is 24Mhz.

In your first message I see

 ATD0CTL4.byte = 0b00100011; ; // 10 bit resolution 4 period 3Khz

ATD clock prescaler is set to 8 in your code. 24MHz /8 = 3MHz  ATD clock. A bit out of specs.