About the xet256 ECT pulse capture interrupt, I want know if there is Pulse detection criteria function

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About the xet256 ECT pulse capture interrupt, I want know if there is Pulse detection criteria function

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hongjianzhang
Contributor III

Recently One of our products encountered a problem about the ECT capture interrupt

Our product use the xet256 mcu, and we use the pt6 as our capture input, and our input is if normal the pulse width is 200ms high pulse and 40ms low pulse, and if abnormal the pulse width is 200ms low pulse and 40ms  high pulse;

we used the pt6 ECT capture input function to do this, that is, we use the rising edge and the falling edge to detect the high pulse width and low pulse width, but sometimes it didn't trigger as we respected , and it often happened when the car is in running, if we use the oscilloscope to view the wave, we didn't find there is any problem;   as the port didn't have the delay counter , i want to know: 1. If there is  Pulse detection criteria function as the port interrupt or it will capture interrupt when there is any change on the port. 2. If the capture port have  Schmidt flip-flop function, and if don't, if  the rising edge wave, is it possible that it will occur two or more interrupt?

I wonder where i can find more information about the inner circuitry and software description or use advise about this

Thank you all    

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lama
NXP TechSupport
NXP TechSupport

Hi,

 

  1. If there is  Pulse detection criteria function as the port interrupt or it will capture interrupt when there is any change on the port.

A: Copy from item 1 bellow: Input signal, the period of the logic level must be minimum 2 bus clock wide in order to be system able to recognize level change.
When level change is recognized then input capture is performed.

  1. If the capture port have  Schmidt flip-flop function, and if don't, if  the rising edge wave, is it possible that it will occur two or more interrupt?

A: The port contains Schmidt trigger. If we set the port for edge recognition, then the flag is set only after level change (edge has happened) and interrupt is serviced as soon as it is possible. (interrupt with higher priority is served, interrupt nesting is/is not implemented)

 

I have created a frequency measurement example in the past and I would like to express here issues I  run into during solution.

Note, that I did not solve duty cycle so I used one type of edge only, however waht I express here is common.

 

1) Input signal, the period of the logic level must be minimum 2 bus clock wide in order to be system able to recognize level change.

2) The period calculation and results processing should be short enough to be able to catch all measured periods. We have also to take into account other interrupts with higher priority. Because of this the best way was to use XGATE to provide data in parallel to CPU workload.

3) In addition to the item 3 we should be sure the input signal does not contain any additional oscillations which could be recognized as an edge.

4) Period calculation must take an overflow into account because we are not able to reset the main timer on capture event or on measurement start.

So, if I am sure that there is no possibility that more than one overflow appears in the measured period then we can calculate period as follows:

 

  if(!ovfs)                                      // Did edges appear within one timer period?

    {

      period = (ULONG)(timerNewValue - timerOldValue);

    }

   else                                           // the ONLY one overflow has appeared between two edges

    {

      period = (ULONG)( ~timerOldValue+1 )+ (ULONG)(  timerNewValue);

                          // time in the first period   + time in a new period

    }

 

 

… and as an inspiration, for more than one overflow within measured period:

#pragma CODE_SEG NON_BANKED

interrupt 9 void ECT_Ch1Isr(void)

{

  unsigned int ovfs;

 

  timerNewValue = ECT_TC1;      // read new captured value and clear flag

  ovfs          = ch1ovfCnt;              // save number of overflows to temporary variable

  ch1ovfCnt     = 0;                          // clear number of overflows

  ECT_TFLG1     = 0B00000010;   // clear interrupt flag from PT1

  

                                                      //-----  period calculation ---------

  if(!ovfs)                                      // Did edges appear within one timer period?

    {

      period = (ULONG)(timerNewValue - timerOldValue);

    }

   else                                           // some number of overflows has appeared between two edges

    {

      // time given by overflows period=....

      period = (ULONG)( ~timerOldValue+1 ); // time in the first period

      period+= (ULONG)(  timerNewValue);    // time in the last  period

      period+= (ULONG)((ULONG)((ovfs-1)) * (ULONG)(65536));

    }

  timerOldValue = timerNewValue; // prepare new old value

  NEW_VALUE_PREPARED = TRUE;     // information for main routine

  FREQUENCY_TOO_LOW  = FALSE;    // clear flag

}

#pragma CODE_SEG DEFAULT
//******************************************************************

#pragma CODE_SEG NON_BANKED

interrupt 16 void ECT_OvfIsr(void)       // Counts number of overflows between two rising edges

{

  ch1ovfCnt++;                      // count overflows

 

  if(ch1ovfCnt>MAX_OVERFLOWS)

   {

     ch1ovfCnt = 0;

     FREQUENCY_TOO_LOW = TRUE;

     SCI0_SendValue();              // send message to the PC

   }

  else

   { FREQUENCY_TOO_LOW = FALSE;

   } 

 

  ECT_TFLG2 = 0B10000000;            // clear interrupt flag of main timer

}

#pragma CODE_SEG DEFAULT

 

Best regards,

 

Ladislav

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