P1010 Secure Boot

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P1010 Secure Boot

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jasonkalin
Contributor I

There is a mechanism in the following document/link/post that appears to be using an i2c sequence to force a secure boot without permanently burning any fuses - just writing the shadow registers and resetting.  Can this be applied on the P1010RDB?  It seems to imply it may need some FPGA support?

https://community.nxp.com/docs/DOC-102268 

Generally, I have not been able to find a clear P1010-specific procedure for soft-fused and hard-fused secure boot prototyping and manufacturing that has relatively high level tools (u-boot or linux command line[no register writing or CCS]) for doing everything from code signing thru  soft and/or hard fuse burning and testing.  I have pieces here and there in the platform manual, the SDK manual, the manufacturing for trust whitepapers - Does anybody know if this exists?

Regards,

Jason Kalin

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ufedor
NXP Employee
NXP Employee

It is convenient to discuss/investigate the Trust Architecture questions as Technical Cases:

https://community.freescale.com/thread/381898

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