Layerscape 1043A GPIO Pin Configuration

[danielberhe]

Hi All, 

I have been trying to figure out how to configure a Layerscape 1043A pin as GPIO. I'm trying to do this in the device tree and was hoping it would be similar to the IMX processors like shown below but haven't been able to find a device tree to demonstrate this.

&iomuxc {

    pinctrl_hog: hoggrp {
        fsl,pins = <
            MX6SX_PAD_SD1_DATA0__GPIO6_IO_2 0x00000010
            MX6SX_PAD_SD1_DATA3__GPIO6_IO_5 0x00000010
            MX6SX_PAD_CSI_DATA03__GPIO1_IO_17 0x00000010
            MX6SX_PAD_LCD1_DATA00__GPIO3_IO_1 0x00000010
            MX6SX_PAD_LCD1_DATA01__GPIO3_IO_2 0x00000010
         >;
      };
};

Does anyone have have an example showing how this is done for the Layerscape 1043A?

Daniel

[danielberhe]

Thank you ufedor!

[ufedor · Accepted solution]

The LS1043A is capable to configure multiplexed pins functions only during POR using the RCW data. Run-time reconfiguration is not possible.

Please refer to the QorIQ LS1043A Reference Manual, Table 4-14. RCW Field Descriptions.