DDR: Failed to read SPD from address 81 [t1042]

[yusufalti333]

Hello nxp;

My custom design has a serious DDR problem, I have 16 GB total amount of Physical ram on design. Corresponding U-boot log (taken with Code Warrior -> Connect -> Debug session).

I changed recommended U-boot parameteres for my design in it's source code ( Ram size = 4*4096, CPU_FREQ=100MHZ and DDR_FREQ = 100MHZ)

I attached RCW configurations taken from QCVS.

Is there any way to close SPD check to skip this step ?

Or is there any way to fix this issue ? 

Thanks.

Note:

1-) I also made a DDR test using Hardware Diagnostic Tool of Code Warrior PA. Settings are attached. I just tested first 2 Mbyte of DDR and test passed. 

2-) When I remove physical ram of T1042D4 Reference Demo board from it's slot, U-boot is exactly giving the same error.

Logs:

L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word(RCW):
00000000: 080a000a 0a000000 00000000 00000000
00000010: 06000002 00408102 fc027000 21002000
00000020: 00800000 00000000 60000000 0003a001
00000030: 00000100 c0165005 00000000 00000000
Board: T1042D4RDB
Board rev: 0x01 CPLD ver: 0x05, vBank: 0x7

I2C: ready
SPI: ready
DRAM: Initializing....using SPD
DDR: failed to read SPD from address 81
Error: No valid SPD detected.
*** failed ***
initcall sequence effcf3f8 failed at call eff5ce5c (err=1)
### ERROR ### Please RESET the board ###

[Bulat]

You question is not so clear, do you use a 16GB DIMM? Or different memory configuration?

Regards,

Bulat

[yusufalti333]

Hello,
I am using 16 GB UDIMM. 

[Bulat]

Ok, do you mean that u-boot can not find SPD?

[yusufalti333]

Yes, I am debugging U-boot with Code Warrior's connect method and having these logs on serial port

LOGS (after processor information):

L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word(RCW):
00000000: 080a000a 0a000000 00000000 00000000
00000010: 06000002 00408102 fc027000 21002000
00000020: 00800000 00000000 60000000 0003a001
00000030: 00000100 c0165005 00000000 00000000
Board: T1042D4RDB
Board rev: 0x01 CPLD ver: 0x05, vBank: 0x7

I2C: ready
SPI: ready
DRAM: Initializing....using SPD
DDR: failed to read SPD from address 81
Error: No valid SPD detected.
*** failed ***
initcall sequence effcf3f8 failed at call eff5ce5c (err=1)
### ERROR ### Please RESET the board ###

I also noticed that,

I have a demo board of t1042 and when I remove physical RAM memory of demo board and try to boot it, u-boot on demo board is giving me the same error. I just want to know what is reason behind this error and how can I solve on my Custom board.

Thanks.

[Bulat]

Can you provide schematics of the DIMM connection?

[yusufalti333]

A correction:

Memory test is not working. It was working when I use CPC as SRAM and memory map it at offset 0. When I try to use init_core.tcl instead of init_sram.tcl ( which initialized DDR registers ). Memory test fails at first step ( Walking ones test )

[yusufalti333]

Hello bulat‌

Is it possible to solve this thread as technical case ? Due to some security requirements of company, it's forbidden to share schematics on public contents.

[Bulat]

Yes, please create a technical case, it will be more convenient.

Regards,

Bulat