The datasheet indicates that the MC33HB2001 has internal pullups to 5V and I am questioning if this is correct when VDDQ of 3.3V is applied:
When looking at the development board FRDM-HB2001FEVM it looks like you can connect VRDM_VDD to VDD and VDD to VDDQ.
Could someone confirm if these internal pullups are to VDDQ or is there an internal 5V regulator?
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Hi David,
The pull-up level is dependent upon the voltage level applied to VDDQ. If 3.3V is applied on VDDQ, the internal pull-ups will be to 3.3V for these logic pins. I think the spec is referring to a 5.0V applied to VDDQ scenario.
Best regards,
Tomas
I have laid out a development board using the MC33HB2001FKR2. I supplied 12V to VPWR (pins 12,13,29,30) and 3.3V to VDDQ (pin 1) and CS_B (pin 32) measures to be 0V. According to the datasheet the CS_B pin should be internally pulled up. Can you confirm or deny? I confirm the same behavior on the NXP development board FRDM-HB2001FEVM.
Hi David,
Yes, CS_B has an internal weak pull-up to VDDQ. The FRDM-HB2001FEVM development board drives the SPI signals at 3.3V. The MCU should not be holding the CS_B pin low while data is not being transmitted.
Best regards,
Tomas
Hi David,
The pull-up level is dependent upon the voltage level applied to VDDQ. If 3.3V is applied on VDDQ, the internal pull-ups will be to 3.3V for these logic pins. I think the spec is referring to a 5.0V applied to VDDQ scenario.
Best regards,
Tomas