MPC8641D+DDR2 ECC enabling

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

MPC8641D+DDR2 ECC enabling

ソリューションへジャンプ
817件の閲覧回数
rekham
Contributor I

Hi I am new to developing a board with MPC8641D with enabling DDR2 ECC.

   My question is We are designed our customized board using power pc MPC8641 processor with DDR2 ecc as in document MPC8641DRM-pg no 8-49(415), and enabled ECC in DDR SDRAM Control Configuration (DDR_SDRAM_CFG). But my board was not booting with ecc. without ecc its booting. I am missing anything regarding this DDR2 ECC, please let me know is there any problem with my code.

Is there any problem while booting with this ECC. please let me know procedure for this

0 件の賞賛
返信
1 解決策
680件の閲覧回数
r8070z
NXP Employee
NXP Employee

Have a great day,

There may be hardware problem on the ECC byte lane or ECC memory was not properly initialized. After power-on the ECC DDR memory does not contain valid ECC syndromes. Hence read access from uninitialized ECC memory will raise ECC error. Notice that 32-bit write access also starts from read. Preferable way of ECC memory initialization is DRAM data initialization enabled by D_INIT. ECC is correctly generated and stored during the DRAM data initialization when D_INIT is set.

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

元の投稿で解決策を見る

2 返答(返信)
681件の閲覧回数
r8070z
NXP Employee
NXP Employee

Have a great day,

There may be hardware problem on the ECC byte lane or ECC memory was not properly initialized. After power-on the ECC DDR memory does not contain valid ECC syndromes. Hence read access from uninitialized ECC memory will raise ECC error. Notice that 32-bit write access also starts from read. Preferable way of ECC memory initialization is DRAM data initialization enabled by D_INIT. ECC is correctly generated and stored during the DRAM data initialization when D_INIT is set.

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

680件の閲覧回数
rekham
Contributor I

thank you its working after enable the D_INIT.

0 件の賞賛
返信