I am working on MPC8270 Power Quic II processor. We designed a board using this processor and because of some doubt we used two bootflashes at Chip Select 0 (CS0), with a selection switch. One bootflash is SST39VF040 (512KB) and other is S29GL512T (64MB). Hardware wise both are okay as our processor can read write erase both these flashes whenever either of these is selected.
Problem :
Problem comes when we try to boot from these flashes. SST39VF040 works fine and processor boots fine. But with S29GL512T processor is not booting.
Speculation :
1 - MPC8270 says reset vector lies at 0xFFF00100 and with SST39VF040, when we program the flash starting address is 0xFFF00000 and it works fine. But for S29GL512T we have to give starting address 0xF0000000, beacause it is 64MB flash we cannot give 0xFFF00000. Is this the problem? If this is the problem then it means with MPC8270 we cannot boot from a bootflash greater than 1024KB because range from 0xFFF00000 - 0xFFF7FFFF is 0xFFFFF (1024Kb) .
2 - Access time of SST39VF040 is 45ns and S29GL512T is 100ns. When MPC8270 is fetching HCRW from 0xFFF00100 at CS0, what access time it follows?
You wrote:
> But for S29GL512T we have to give starting address 0xF0000000,
> beacause it is 64MB flash we cannot give 0xFFF00000.
This is not absolutely required.
The only limitation is the OR0[AM] reset value which defines 32MB chip-select 0.
In this case the boot image has to be correctly "positioned" inside the 64MB Flash during programming.
> we cannot boot from a bootflash greater than 1024KB because
> range from 0xFFF00000 - 0xFFF7FFFF is 0xFFFFF (1024Kb)
This conclusion is incorrect.
Please consider that the Initial internal space base address is defined in the HRCW[ISB].