Lauterbach Trace32 Debugger with T4160RDB-64b

[vinothkumars]

Hi All,

I am using Lauterbach for u-boot debugging in t4160rdb-64bit target. I got "debug port fail" error when i am doing u-boot debugging in alternative manner.

In U-boot assembly instruction,

_start_cont:
/* Setup the stack in initial RAM,could be L2-as-SRAM or L1 dcache*/
lis r3,(CONFIG_SYS_INIT_RAM_ADDR)@h
ori r3,r3,((CONFIG_SYS_INIT_SP_OFFSET-16)&~0xf)@l /* Align to 16 */
li r0,0
stw r0,0(r3) /* Terminate Back Chain */
stw r0,+4(r3) /* NULL return address. */
mr r1,r3 /* Transfer to SP(r1) */

GET_GOT

/* Pass our potential ePAPR device tree pointer to cpu_init_early_f */
mr r3, r24

bl cpu_init_early_f

/* switch back to AS = 0 */
lis r3,(MSR_CE|MSR_ME|MSR_DE)@h
ori r3,r3,(MSR_CE|MSR_ME|MSR_DE)@l
mtmsr r3
isync

bl cpu_init_f /* return boot_flag for calling board_init_f */
bl board_init_f
isync

mtmsr instruction jump to next location when change the value of MSR register to 0x230 (DE =1, IS=1 and DS=1) or otherwise jump to some other junk value.

I got some unwanted jump when enter into some function,

eff42590 <disable_law>:
eff42590: 81 42 00 b0 lwz r10,176(r2)
eff42594: 39 20 ff fe li r9,-2
eff42598: 5d 29 18 3e rotlw r9,r9,r3
eff4259c: 54 63 20 36 rlwinm r3,r3,4,0,27
eff425a0: 7d 29 50 38 and r9,r9,r10
eff425a4: 39 40 00 00 li r10,0
eff425a8: 91 22 00 b0 stw r9,176(r2)
eff425ac: 39 23 00 08 addi r9,r3,8
eff425b0: 3d 29 fe 00 addis r9,r9,-512
eff425b4: 7c 00 04 ac sync
eff425b8: 91 49 0c 00 stw r10,3072(r9)
eff425bc: 39 03 00 04 addi r8,r3,4
eff425c0: 3d 08 fe 00 addis r8,r8,-512
eff425c4: 7c 00 04 ac sync
eff425c8: 91 48 0c 00 stw r10,3072(r8)
eff425cc: 3c 63 fe 00 addis r3,r3,-512
eff425d0: 7c 00 04 ac sync
eff425d4: 91 43 0c 00 stw r10,3072(r3)
eff425d8: 7c 00 04 ac sync
eff425dc: 81 29 0c 00 lwz r9,3072(r9)
eff425e0: 0c 09 00 00 twi 0,r9,0
eff425e4: 4c 00 01 2c isync
eff425e8: 4e 80 00 20 blr

what I want to do and which place I want to do the configure either script side or u-boot code side ?

If it possible please provide the fixes.

Regards, VinothS

[vinothkumars]

There is a unwanted jumps happen when enter into this part of disable_law,

void disable_law(u8 idx)
{
gd->arch.used_laws &= ~(1 << idx);

out_be32(LAWAR_ADDR(idx), 0);
set_law_base_addr(idx, 0);

/* Read back so that we sync the writes */
in_be32(LAWAR_ADDR(idx));

return;
}

I don't know why this happening. Because,  "out_be32" predefined function.

Is there any invalidate access issue?

why because I got same error when disable the tlb also,

void disable_tlb(u8 esel)
{
u32 _mas0, _mas1, _mas2, _mas3;

free_tlb_cam(esel);

_mas0 = FSL_BOOKE_MAS0(1, esel, 0);
_mas1 = 0;
_mas2 = 0;
_mas3 = 0;

mtspr(MAS0, _mas0);
mtspr(MAS1, _mas1);
mtspr(MAS2, _mas2);
mtspr(MAS3, _mas3);
#ifdef CONFIG_ENABLE_36BIT_PHYS
mtspr(MAS7, 0);
#endif
asm volatile("isync;msync;tlbwe;isync");

#ifdef CONFIG_ADDR_MAP
if (gd->flags & GD_FLG_RELOC)
addrmap_set_entry(0, 0, 0, esel);
#endif
}

Regards,

VinothS

[vinothkumars · Accepted solution]

Hi,

disable_non_ddr_law function have ddr releated thing and all law entries. But, we don't want the ddr now and we needs to disable all law's expect the configured law in script.

Regards, VinothS