LS1021 ucc_uart giving kernel panic

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LS1021 ucc_uart giving kernel panic

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2,446 次查看
m_syed_ahmed
Contributor III

Hi,

I am working on LS1021ATWR. I downloaded NXP provided SDK for kernel development. I enabled required configrurations for ucc_uart  and hdlc (QE engine).I didnt modify anything in the source code. When running test application, ucc_uart is throwing error. LPUART works fine in that application.

root@ls1021atwr:~# /serial_test -s -e -p /dev/ttyLP0 
Linux serial test app
/dev/ttyLP0: No data received for 2.3s.
/dev/ttyLP0: No data received for 3.6s.
/dev/ttyLP0: No data received for 5.0s.
/dev/ttyLP0: count for this session: rx=0, tx=69392, rx err=0
/dev/ttyLP0: TIOCGICOUNT: ret=0, rx=0, tx=65297, frame = 0, overrun = 0, parity = 0, brk = 0, buf_overrun = 0
/dev/ttyLP0: No data received for 6.3s.
/dev/ttyLP0: No data received for 7.6s.
random: nonblocking pool is initialized
/dev/ttyLP0: No data received for 9.0s.
/dev/ttyLP0: No data received for 10.3s.
/dev/ttyLP0: No data received for 11.6s.
/dev/ttyLP0: count for this session: rx=0, tx=138513, rx err=0
/dev/ttyLP0: TIOCGICOUNT: ret=0, rx=0, tx=134418, frame = 0, overrun = 0, parity = 0, brk = 0, buf_overrun = 0
^C
root@ls1021atwr:~# /serial_test -s -e -p /dev/ttyQE0 
Linux serial test app
qe2cpu_addr: addr=0
------------[ cut here ]------------
kernel BUG at /home/zumi/QorIQ-SDK-V2.0-20160527-yocto/build_ls1021atwr/tmp/work-shared/ls1021atwr/kernel-source/drivers/tty/serial/ucc_uar!
Internal error: Oops - BUG: 0 [#1] SMP THUMB2
Modules linked in:
CPU: 1 PID: 330 Comm: serial_test Not tainted 4.1.8-rt8+gbd51baf #25
Hardware name: Freescale LS1021A
task: bebaf440 ti: be00a000 task.ti: be00a000
PC is at qe_uart_tx_pump+0x16e/0x1dc
LR is at qe_uart_tx_pump+0x16f/0x1dc
pc : [<801e2a22>]    lr : [<801e2a23>]    psr: a00600b3
sp : be00be98  ip : 00000030  fp : 00000400
r10: 60060013  r9 : be4cb600  r8 : 00000000
r7 : bf09c000  r6 : bf0bc400  r5 : c0850520  r4 : be804400
r3 : 00000001  r2 : 00000000  r1 : 00000007  r0 : 00000013
Flags: NzCv  IRQs off  FIQs on  Mode SVC_32  ISA Thumb  Segment user
Control: 70c5387d  Table: beb90a80  DAC: e6bff97b
Process serial_test (pid: 330, stack limit = 0xbe00a210)
Stack: (0xbe00be98 to 0xbe00c000)
be80:                                                       be804400 bf0bc400
bea0: 00000000 be4ce000 be804400 801e2d7b 00000000 801dc75f 801dc6d7 be4cb600
bec0: 00000400 be4cdc00 c0bf3274 be4cb680 be403540 be4cdc00 beb90cc0 801ce89f
bee0: be4cb78c 800acb51 00000041 00000000 bebaf440 8004d3e7 be4cb790 be4cb790
bf00: 00000000 be4cb600 00000000 00000400 801ce65d 00025018 00000400 be00a000
bf20: beb90cc0 801cc19d 00001538 be403540 801ce65d 00000400 00000000 00000400
bf40: be403540 00025018 be00bf88 80018bc4 be00a000 00000000 00000000 800a414b
bf60: be403540 00025018 00000400 be403540 be403540 00025018 00000400 80018bc4
bf80: be00a000 800a4627 00000000 00000000 00000400 00012455 00000000 00010999
bfa0: 00000004 80018a21 00012455 00000000 00000003 00025018 00000400 00000400
bfc0: 00012455 00000000 00010999 00000004 00000000 00000000 76f35000 00000000
bfe0: 00000000 7edadbf4 00011809 76e890b0 60060010 00000003 00001fff 00002000
[<801e2a22>] (qe_uart_tx_pump) from [<801e2d7b>] (qe_uart_start_tx+0x1f/0x42)
[<801e2d7b>] (qe_uart_start_tx) from [<801dc75f>] (uart_write+0x89/0x9a)
[<801dc75f>] (uart_write) from [<801ce89f>] (n_tty_write+0x243/0x2c4)
[<801ce89f>] (n_tty_write) from [<801cc19d>] (tty_write+0x109/0x17c)
[<801cc19d>] (tty_write) from [<800a414b>] (vfs_write+0x63/0xd8)
[<800a414b>] (vfs_write) from [<800a4627>] (SyS_write+0x27/0x54)
[<800a4627>] (SyS_write) from [<80018a21>] (ret_fast_syscall+0x1/0x4c)
Code: 491b 481b f148 fb65 (de02) f04f 
---[ end trace ee79774bc7f1b2a6 ]---

 

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yipingwang
NXP TechSupport
NXP TechSupport

Please check whether the following message would be found when booting the target board.

of_serial 2402200.ucc: clk or clock-frequency not defined
of_serial: probe of 2402200.ucc failed with error -2
Freescale QUICC Engine UART device driver
ucc-uart: Using loopback mode
2402200.ucc: ttyQE1 at MMIO 0x2402200 (irq = 288, base_baud = 6250000) is a QE
ucc_uart 2402200.ucc: UCC3 assigned to /dev/ttyQE1

The attached is QE ucode image, please check whether you have programmed QE ucode image at 0x600c0000 on NOR flash.

在原帖中查看解决方案

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m_syed_ahmed
Contributor III

Hi yipingwang,

I am currently working on Single board without loopback. I think I can only test Tx alone. HDLC is transmitting continously, but UART transmits only once. Can you suggest why its happening?

root@atc-gen2:~# /serial_test -s -e -p /dev/ttyQE0
Linux serial test app
/dev/ttyQE0: No data received for 2.0s. No data transmitted for 2.0s.
/dev/ttyQE0: No data received for 3.0s. No data transmitted for 3.0s.
/dev/ttyQE0: No data received for 4.0s. No data transmitted for 4.0s.
/dev/ttyQE0: No data received for 5.0s. No data transmitted for 5.0s.
/dev/ttyQE0: No data received for 6.0s. No data transmitted for 6.0s.
/dev/ttyQE0: count for this session: rx=0, tx=4223, rx err=0
/dev/ttyQE0: TIOCGICOUNT: ret=0, rx=0, tx=128, frame = 0, overrun = 0, parity = 0, brk = 0, buf_overrun = 0
/dev/ttyQE0: No data received for 7.0s. No data transmitted for 7.0s.
/dev/ttyQE0: No data received for 8.0s. No data transmitted for 8.0s.
/dev/ttyQE0: No data received for 9.0s. No data transmitted for 9.0s.
/dev/ttyQE0: No data received for 10.0s. No data transmitted for 10.0s.
/dev/ttyQE0: No data received for 11.0s. No data transmitted for 11.0s.
/dev/ttyQE0: No data received for 12.0s. No data transmitted for 12.0s.
/dev/ttyQE0: count for this session: rx=0, tx=4223, rx err=0
/dev/ttyQE0: TIOCGICOUNT: ret=0, rx=0, tx=128, frame = 0, overrun = 0, parity = 0, brk = 0, buf_overrun = 0
/dev/ttyQE0: No data received for 13.0s. No data transmitted for 13.0s.
^Cucc_uart 2402000.ucc: shutdown timeout

root@atc-gen2:~# /se
serial_test sethdlc
root@atc-gen2:~# /sethdlc hdlc0 hdlc
root@atc-gen2:~# ifconfig hdlc0 192.168.0.1 up
hdlc0: Carrier detected
root@atc-gen2:~# route add -net 192.168.0.0 netmask 255.255.255.0 gw 192.168.0.1 hdlc0;
root@atc-gen2:~# route add -net 192.168.0.0 netmask 255.255.255.0 gw 192.168.0.1 hdlc0
route: SIOCADDRT: File exists
root@atc-gen2:~# ping 192.168.0.2 -c 4
PING 192.168.0.2 (192.168.0.2): 56 data bytes

--- 192.168.0.2 ping statistics ---
4 packets transmitted, 0 packets received, 100% packet loss

root@atc-gen2:~# ifconfig hdlc0
hdlc0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00
inet addr:192.168.0.1 P-t-P:192.168.0.1 Mask:255.255.255.255
UP POINTOPOINT RUNNING NOARP MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:16
RX bytes:0 (0.0 B) TX bytes:172 (172.0 B)

root@atc-gen2:~#

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yipingwang
NXP TechSupport
NXP TechSupport

Would you please provide your Linux Kernel bootup log?

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m_syed_ahmed
Contributor III

Hi,

Even after flashing the QE code binary in corresponding memory address, UART was transmitting only once. But, after sometime, it started sending continously. HDLC also working as intended.

Now, I needs to enable both (HDLC and UART) in the same port. So, I am looking into QEIWRM for switching between protocols. Is that steps same for all processors? What should be the steps in LS1021-atwr? Also in which source code we needs to implement this switching between protocols steps?

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yipingwang
NXP TechSupport
NXP TechSupport

Would you please provide a new thread to address your new requirement?

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m_syed_ahmed
Contributor III
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m_syed_ahmed
Contributor III

HDLC also giving Kernel Panic. 

dts file entry

&uqe {
status = "okay";
serial: ucc@2000 {
device_type = "serial";
compatible = "ucc_uart";
cell-index = <1>;
port-number = <0>;
reg = <0x2000 0x200>;
rx-clock-name = "brg1";
tx-clock-name = "brg1";
};

ucc_hdlc: ucc@2200 {
compatible = "fsl,ucc_hdlc";
rx-clock-name = "brg2";
tx-clock-name = "brg2";
fsl,rx-sync-clock = "none";
fsl,tx-sync-clock = "none";
fsl,tx-timeslot = <0xfffffffe>;
fsl,rx-timeslot = <0xfffffffe>;
fsl,tdm-framer-type = "e1";
fsl,tdm-mode = "normal";
fsl,tdm-id = <1>;
fsl,siram-entry-id = <2>;
fsl,inter-loopback;
};
};

  Enabled FSL_UCC_HDLC, CONFIG_FSL_UCC_TDM, CONFIG_QUICC_ENGINE in menuconfig.

Log File

root@atc-gen2:~# ifconfig hdlc0 192.168.0.1 up
root@atc-gen2:~# route add -net 192.168.0.0 netmask 255.255.255.0 gw 192.168.0.1 hdlc0;
root@atc-gen2:~# route -n
Kernel IP routing table
Destination Gateway Genmask Flags Metric Ref Use Iface
192.168.0.0 192.168.0.1 255.255.255.0 UG 0 0 0 hdlc0
root@atc-gen2:~# ping 192.168.0.2;
PING 192.168.0.2(192.168.0.2)Unable to handle kernel NULL pointer dereference at virtual address 00000020
: 56 data bytespgd = be620840

[00000020] *pgd=be6c2003, *pmd=bebad003, *pte=00000000
Internal error: Oops: 207 [#1] SMP THUMB2
Modules linked in:
CPU: 1 PID: 342 Comm: ping Not tainted 4.1.8-rt8+gbd51baf #38
Hardware name: Freescale LS1021A
task: be659c80 ti: be6c6000 task.ti: be6c6000
PC is at hdlc_start_xmit+0x14/0x54
LR is at hdlc_start_xmit+0xf/0x54
pc : [<8023fb28>] lr : [<8023fb23>] psr: 600b0033
sp : be6c7ca8 ip : 00000030 fp : 00000000
r10: be970200 r9 : 00000001 r8 : 00000000
r7 : bf1cf000 r6 : be419c00 r5 : be419c00 r4 : bf1cf000
r3 : 00000000 r2 : 3f2bd000 r1 : bf7d942c r0 : 8047275d
Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA Thumb Segment user
Control: 70c5387d Table: be620840 DAC: e6b7f17b
Process ping (pid: 342, stack limit = 0xbe6c6210)
Stack: (0xbe6c7ca8 to 0xbe6c8000)
7ca0: be54bc00 be419c00 be419c00 802b8001 00000000 bf1cf000
7cc0: 00000000 be6c7d0c 805252f4 bf1cf000 bf1cf000 00000000 be970200 00000000
7ce0: 00000000 be54bc00 be970200 be419c00 bf1cf000 be54bc68 00000001 be54bc68
7d00: 00000000 802c7857 be419c00 00000010 bf1cf000 be54bc00 be419c00 bf1cf000
7d20: be970200 00000000 00000000 802b81e7 be54bc68 00000001 00000800 fffffff4
7d40: be419c00 be54b800 bf1cf000 beb84e00 00000040 00000000 00000000 802d2285
7d60: 4550c7f6 801aaf0b ffffc4a0 0200a8c0 be54ba20 be419c00 bf1d0c80 bf1cf000
7d80: be6c7ee4 00000040 00000000 802d3137 00000000 802d2abd be65a100 be54ba00
7da0: be6c7df8 be419c00 bf1d0c80 802d2b75 bf1d0c80 8054c4c0 00000000 802d3817
7dc0: 00000000 bf1d0c80 00000000 802e8d23 00000040 00000000 be6c7e08 be6c7df0
7de0: 00000000 bf8054e0 00000000 00000000 00000000 8007a325 be6c7ee4 00000008
7e00: be5185b0 00000002 0200a8c0 00000000 00000000 ffff0000 80551740 00000000
7e20: 80022cdb be5184e0 bffbd5a0 be5184e0 76fad000 80094b6f 00000005 00000001
7e40: 00000000 00010000 00000000 0100a8c0 0200a8c0 00000008 00005401 be5184e0
7e60: be1ad75f 00e00000 be526db8 bf2b1c00 fffff000 000000ff 00000d68 80092093
7e80: 00000000 bf2b1c00 be6c7ee4 76fac000 04600000 00111ae8 bec46f00 be6c7f10
7ea0: 00000000 bec46f00 0000001c 00111ae8 be6c6000 00000000 00000000 802a9459
7ec0: 00000000 802aa0d5 be6c7eec 8004d08b 000080d0 00000000 00000000 001140f8
7ee0: 00000040 be6c7f10 0000001c 00000001 00000000 00000000 be6c7ee4 00000000
7f00: 00000000 00000000 00000000 bf1d0c80 00000002 0200a8c0 00000000 00000000
7f20: 00000000 00000000 00000000 00000000 81e64bc4 00000000 81e3e91e 00000000
7f40: ffffffff 00ffffff 00000000 002887fa 76f02000 be6c7f90 00000001 000120cc
7f60: 00000107 80018bc4 be6c6000 00000001 000120cc 00000107 80018bc4 7ebc8b68
7f80: 00000008 00000000 7ebc8b68 8005dadd 00111ae8 0000001c 000473ec 00000122
7fa0: 80018bc4 80018a21 00111ae8 0000001c 00000000 001140f8 00000040 00000000
7fc0: 00111ae8 0000001c 000473ec 00000122 00000000 7ebc8bf0 00111840 00000000
7fe0: 7ebc8b60 7ebc8b54 00021d0c 76e99a58 600b0010 00000000 ffffffff ffffffff
[<8023fb28>] (hdlc_start_xmit) from [<802b8001>] (dev_hard_start_xmit+0x187/0x1ea)
[<802b8001>] (dev_hard_start_xmit) from [<802c7857>] (sch_direct_xmit+0x77/0x140)
[<802c7857>] (sch_direct_xmit) from [<802b81e7>] (__dev_queue_xmit+0x183/0x374)
[<802b81e7>] (__dev_queue_xmit) from [<802d2285>] (ip_finish_output+0x689/0x6c8)
[<802d2285>] (ip_finish_output) from [<802d3137>] (ip_output+0x8f/0xc8)
[<802d3137>] (ip_output) from [<802d3817>] (ip_send_skb+0xb/0x74)
[<802d3817>] (ip_send_skb) from [<802e8d23>] (raw_sendmsg+0x41f/0x58c)
[<802e8d23>] (raw_sendmsg) from [<802a9459>] (sock_sendmsg+0xb/0x16)
[<802a9459>] (sock_sendmsg) from [<802aa0d5>] (SyS_sendto+0x6d/0x80)
[<802aa0d5>] (SyS_sendto) from [<80018a21>] (ret_fast_syscall+0x1/0x4c)
Code: fbcd f8d4 34c8 480d (6a19) f0eb
---[ end trace 97f619b8ef20b610 ]---
Kernel panic - not syncing: Fatal exception in interrupt
CPU0: stopping
CPU: 0 PID: 0 Comm: swapper/0 Tainted: G D 4.1.8-rt8+gbd51baf #38
Hardware name: Freescale LS1021A
[<8001caa1>] (unwind_backtrace) from [<8001add7>] (show_stack+0xb/0xc)
[<8001add7>] (show_stack) from [<8032d5b9>] (dump_stack+0x51/0x64)
[<8032d5b9>] (dump_stack) from [<8001c187>] (handle_IPI+0x7f/0xf4)
[<8001c187>] (handle_IPI) from [<80009337>] (gic_handle_irq+0x37/0x40)
[<80009337>] (gic_handle_irq) from [<80330ddb>] (__irq_svc+0x3b/0x5c)
Exception stack(0x80523f58 to 0x80523fa0)
3f40: 00000001 00000000
3f60: 00000000 80023141 80522000 00000000 00000000 80523fa8 8051c41c 00000001
3f80: 805148f0 00000000 80524180 80523fa0 80019431 80019432 40060033 ffffffff
[<80330ddb>] (__irq_svc) from [<80019432>] (arch_cpu_idle+0x14/0x1e)
[<80019432>] (arch_cpu_idle) from [<8004dad9>] (cpu_startup_entry+0x175/0x1b0)
[<8004dad9>] (cpu_startup_entry) from [<804ec917>] (start_kernel+0x273/0x2dc)
---[ end Kernel panic - not syncing: Fatal exception in interrupt

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yipingwang
NXP TechSupport
NXP TechSupport

You could download  sethdlc  application  from https://mirrors.edge.kernel.org/pub/linux/utils/net/hdlc/.

Please refer to the following procedure to test hdlc

root@ls1021atwr:~# ./sethdlc hdlc0 hdlc
root@ls1021atwr:~# ifconfig hdlc0 192.168.0.1 up
root@ls1021atwr:~# route add -net 192.168.0.0 netmask 255.255.255.0 gw 192.168.0.1 hdlc0
root@ls1021atwr:~# ping 192.168.0.2 -c 2
PING 192.168.0.2 (192.168.0.2) 56(84) bytes of data.

Transmitted data:
68
aa 44
0 0
0 54
73 16
40 0
40 1
46 3f
c0
Received data:
68
aa 44
0 0
0 54
73 16
40 0
40 1
46 3f
c0
Transmitted data:
69
aa 44
0 0
0 54
73 29
40 0
40 1
46 2c
c0

2,358 次查看
m_syed_ahmed
Contributor III

Hi,

I am currently testing in Single board without loopback. So, I think I can test Tx operation alone. In that case, HDLC is transmitting continously while UART transmits only once. HDLC Tx packets was not increasing in ifconfig output.

root@atc-gen2:~# /serial_test -s -e -p /dev/ttyQE0
Linux serial test app
/dev/ttyQE0: No data received for 2.0s. No data transmitted for 2.0s.
/dev/ttyQE0: No data received for 3.0s. No data transmitted for 3.0s.
/dev/ttyQE0: No data received for 4.0s. No data transmitted for 4.0s.
/dev/ttyQE0: No data received for 5.0s. No data transmitted for 5.0s.
/dev/ttyQE0: No data received for 6.0s. No data transmitted for 6.0s.
/dev/ttyQE0: count for this session: rx=0, tx=4223, rx err=0
/dev/ttyQE0: TIOCGICOUNT: ret=0, rx=0, tx=128, frame = 0, overrun = 0, parity = 0, brk = 0, buf_overrun = 0
/dev/ttyQE0: No data received for 7.0s. No data transmitted for 7.0s.
/dev/ttyQE0: No data received for 8.0s. No data transmitted for 8.0s.
/dev/ttyQE0: No data received for 9.0s. No data transmitted for 9.0s.
/dev/ttyQE0: No data received for 10.0s. No data transmitted for 10.0s.
/dev/ttyQE0: No data received for 11.0s. No data transmitted for 11.0s.
/dev/ttyQE0: No data received for 12.0s. No data transmitted for 12.0s.
/dev/ttyQE0: count for this session: rx=0, tx=4223, rx err=0
/dev/ttyQE0: TIOCGICOUNT: ret=0, rx=0, tx=128, frame = 0, overrun = 0, parity = 0, brk = 0, buf_overrun = 0
/dev/ttyQE0: No data received for 13.0s. No data transmitted for 13.0s.
/dev/ttyQE0: No data received for 14.0s. No data transmitted for 14.0s.
/dev/ttyQE0: No data received for 15.0s. No data transmitted for 15.0s.
^Cucc_uart 2402000.ucc: shutdown timeout

root@atc-gen2:~# /sethdlc hdlc0 hdlc
fconfig hdlc0 192.168.0.1 up
route add -net 192.168.0.0 netmask 255.255.255.0 gw 192.168.0.root@atc-gen2:~# ifconfig hdlchdlc0: Carrier detected
0 192.168.0.1 up
dlc0
ping 192.168.0.2root@atc-gen2:~# route add -net 192.168.0.0 netmask 255.255.255.0 gw 192.168.0.1 hdlc0
root@atc-gen2:~# ping 192.168.0.2
PING 192.168.0.Tx data skb->len:86 2 (192.168.0.2)
: 56 data bytes
Transmitted data:

ff
44
45
00
00
54
1f
f9
40
00
40
01
99
5c
c0
a8
Tx data skb->len:86

Transmitted data:
ff
44
45
00
00
54
20
42
40
00
40
01
99
13
c0
a8
Tx data skb->len:86

Transmitted data:
ff
44
45
00
00
54
20
6e
40
00
40
01
98
e7
c0
a8
Tx data skb->len:86

Transmitted data:
ff
44
45
00
00
54
20
8a
40
00
40
01
98
cb
c0
a8
Tx data skb->len:86

Transmitted data:
ff
44
45
00
00
54
20
ae
40
00
40
01
98
a7
c0
a8
^C
--- 192.168.0.2 ping statistics ---
5 packets transmitted, 0 packets received, 100% packet loss
root@atc-gen2:~# ifconfig hdlc0
hdlc0 Link encap:UNSPEC HWaddr 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00
inet addr:192.168.0.1 P-t-P:192.168.0.1 Mask:255.255.255.255
UP POINTOPOINT RUNNING NOARP MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:16
RX bytes:0 (0.0 B) TX bytes:430 (430.0 B)

root@atc-gen2:~#

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m_syed_ahmed
Contributor III

Hi yipingwang,

Thanks for the QE code. It works fine. Can you tell me how to enable HDLC in the same serial port? We needs both HDLC and UART in the same port.

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yipingwang
NXP TechSupport
NXP TechSupport

Please check whether the following message would be found when booting the target board.

of_serial 2402200.ucc: clk or clock-frequency not defined
of_serial: probe of 2402200.ucc failed with error -2
Freescale QUICC Engine UART device driver
ucc-uart: Using loopback mode
2402200.ucc: ttyQE1 at MMIO 0x2402200 (irq = 288, base_baud = 6250000) is a QE
ucc_uart 2402200.ucc: UCC3 assigned to /dev/ttyQE1

The attached is QE ucode image, please check whether you have programmed QE ucode image at 0x600c0000 on NOR flash.