Bus Monitor Time out Exception in Power PC MPC8349

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Bus Monitor Time out Exception in Power PC MPC8349

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shantanunakhate
Contributor I

Hello,

         We are using MPC8349 power PC  where we are interfacing a slow speed device to the Local Bus. The local bus is kept in wait state by using the LUPWAIT signal. Now this can be for 2048 max local bus clock cycle. After this the bus monitor shall do a time out exception and Power PC shall process the exception handler routine.

Q1: What can be the contents of the routine which shall restart the same transaction ?

Q2: So after writing this routine ( if successful)  can I rerun the same transaction, given that the LUPWAIT signal is still asserted and there is again a time out. This may happen for an indefinite number of times. What I want is same transaction to be run, and when the LUPWAIT signal is negated, the correct data is read by the system.

Q3: If same transaction cant be run by writing a routine, can I retrieve the Program counter of power PC that was doing this transaction.

Best Regards,

Shantanu

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lunminliang
NXP Employee
NXP Employee

See below technical support comment:

The request is not fully clear.

you could disable the eLBC bus monitor by setting LTEDR[BMD]=1.

Please note that in the described case the CSB will be blocked during the whole eLBC UPM transaction - i.e. the SOC masters (including Core, DMA, TSEC) will stall.

It is highly recommended to implement polling mechanism instead of very long UPM cycles.

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