FS26 normal mode, fault error counter

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

FS26 normal mode, fault error counter

1,553件の閲覧回数
dcygan
Contributor II

Hi,

Would someone give me his thought about the Fault Counter state machine?

In the datasheet, ch. 22.10.2 I read about faults and fail-safe and I see the following:

1. FLT_ERR_CNT is incremented on a fault(31 different sources) but only the fault which had had its reactions for RSTB AND FSB0B activated. Is my understanding correct that unless both signals are asserted my FLT_ERR_CNT doesnt move towards the DFS? When only one is asserted I could have the MCU reset but the counter frozen or I could have the system in fail-safe(independently of MCU) then back to Normal but the counter frozen. Is this correct?

 2. Second case, when FS0B is asserted AND WD_ERR_CNT overflows then Fault error counter still can be incremented. So, the system goes the fail-safe then it is released back to Normal. So, when WD error happens along with other fault (i.e VLDO1 OV) then the counter is incremented, otherwise not?

Thank you in advance,

-Darek

 

ラベル(1)
タグ(3)
0 件の賞賛
返信
5 返答(返信)

1,511件の閲覧回数
guoweisun
NXP TechSupport
NXP TechSupport

1:FLT_ERR_CNT is incremented on a fault(31 different sources) but only the fault which had had its reactions for RSTB AND FSB0B activated.

Is my understanding correct that unless both signals are asserted my FLT_ERR_CNT doesn’t move towards the DFS?

When only one is asserted I could have the MCU reset but the counter frozen or I could have the system in fail-safe(independently of MCU) then back to Normal but the counter frozen. Is this correct?

[gw]See enter into DFS condition below, once error happened which lead to fault error counter increased to setting max value it will enter into DFS,no matter it trigger RSTB /FS0B same time or not :

-RSTB pin low during 8 s

- Or FLT_ERR_CNT[3:0] = FLT_E RR_ CNT_ LIMIT[1:0]

- Or VPRE > VPRE_O VP

- Or xxxTDFS _OTP = 1 & xxxTSD_ I

- Or VPRE < VPRE_ UV H for 5 ms in `Start V PRE ' state

2:

  1. Second case, when FS0B is asserted AND WD_ERR_CNT overflows then Fault error counter still can be incremented. So, the system goes the fail-safe then it is released back to Normal. So, when WD error happens along with other fault (i.e VLDO1 OV) then the counter is incremented, otherwise not?

[gw] if the error still exist the counter will always increment.

0 件の賞賛
返信

1,543件の閲覧回数
guoweisun
NXP TechSupport
NXP TechSupport

1:Enter into DFS conditions:

- RSTB pin low during 8 s

- Or FLT_ERR_CNT[3:0] = FLT_E RR_ CNT_ LIMIT[1:0]

- Or VPRE > VPRE_O VP

- Or xxxTDFS _OTP = 1 & xxxTSD_ I

- Or VPRE < VPRE_ UV H for 5 ms in `Start V PRE ' state

2:Fault error source showed as below, if the error listed still exist no remove the fault error counter will up to max value to trigger the system enter into DFS mode:

guoweisun_0-1688090072056.png

 

 

guoweisun_1-1688090072104.png

 

 

0 件の賞賛
返信

1,527件の閲覧回数
dcygan
Contributor II

Hi guoweisun,

This doesn't answer my question. I know what are the contitions to get to DFS. I asked more how to interpret the ch22.10.2 and when the 'Fault Error Counter' is incremented.

-Darek

0 件の賞賛
返信

1,522件の閲覧回数
guoweisun
NXP TechSupport
NXP TechSupport

which points you don't understand?

0 件の賞賛
返信

1,516件の閲覧回数
dcygan
Contributor II

Please see my first post.

0 件の賞賛
返信