IRQ conflict in P2041

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IRQ conflict in P2041

1,025 次查看
sameerarvikar
Contributor III

pic.jpg

P2041 is connected to 1x4 pcie switch (1 upstream 4 downstream) ,switch is connected to 4 devices where 2nd device is PLx(PCIe <==>PCI bridge) ,PLX is connected to four pci end devices

Above is the architecture i am using for connecting PCI devices ,

I am using P2041 processor ,for which IRQ 5,6,7 ,41 are for interrupts [As per P2041 RM (Table 24.1 and Table 24.3)]

when i run command lspci ,following IRQ numbers are allotted PCI Decvice 2 --> IRQ 18  and PCI 2.x devices --> IRQ 17,18,19,41

Interrupts work fine if PCI Device 1 , 3 , 4 is removed from switch ,

but if i connect all of them

PCI Device 1 get IRQ 17,PCI Device 3 gets 19 ,PCI Device 4 gets 41

So when i try to test interrupts from PCI 2.x devices ,kernel call trace starts coming and segmentation fault comes ,

I am assuming that this is happening because of Same IRQs between pci 2.x devices and pci devices 1,3,4 . i.e only 4 IRQ's are available for 7 end devices

So how to resolve the issue

Can i give different IRQ numbers to PCI DEVICE 1,3,4 . How to do it

Following is from dts file ,what changes should i make in dts file for the above architecture

pcie@ffe201000 {
reg = <0xf 0xfe201000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 0x1000000 0x0 0x0 0xf 0xf8010000 0x0 0x10000>;
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2", "fsl,qoriq-pcie";
device_type = "pci";
#size-cells = <0x2>;
#address-cells = <0x3>;
bus-range = <0x0 0xff>;
clock-frequency = <33333333>;
interrupts = <16 2 1 14>;
fsl,iommu-parent = <0x2d>;
fsl,liodn-reg = <0x11 0x504>;

pcie@0 {
ranges = <0x2000000 0x0 0xe0000000 0x2000000 0x0 0xe0000000 0x0 0x20000000 0x1000000 0x0 0x0 0x1000000 0x0 0x0 0x0 0x10000>;
reg = <0x0 0x0 0x0 0x0 0x0>;
#interrupt-cells = <0x1>;
#size-cells = <0x2>;
#address-cells = <0x3>;
device_type = "pci";
bus-range = <0x0 0xff>;
interrupts = <16 2 1 14>;
interrupt-map-mask = <0xf000 0x0 0x0 0xf>;
interrupt-map = <0x0000 0 0 1 &mpic 41 1 0 0
                            0x0000 0 0 2 &mpic 5 1 0 0
                            0x0000 0 0 3 &mpic 6 1 0 0
                            0x0000 0 0 4 &mpic 7 1 0 0 >;
};
};

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759 次查看
avinashh
Contributor III

Hi Pavel,

Thanks for the reply.

Since all 7 end devices (between primary and secondary buses) are on a single Root complex, Should I write Interrupt mapping for each device (using 16 bit left shift of bus no. and 11 bit left shift of device no.) including switch and bridge buses also in above DTS file?

-Avinash

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Pavel
NXP Employee
NXP Employee

PCI bus supports only four interrupt signals: #INTA, #INTB, #INTC, #INTD.

If you want to use these line for 7 PCI devices, sharing of PCI interrupts should be used. Your software should sharing of PCI interrupts support.

See the following pages:

http://www.tldp.org/HOWTO/Plug-and-Play-HOWTO-7.html

and

http://www.makelinux.net/ldd3/chp-10-sect-5

and

https://linux.die.net/HOWTO/Plug-and-Play-HOWTO-7.html

 

Use MSI interrupts for your configuration. See the following pages:

http://www.tldp.org/HOWTO/Plug-and-Play-HOWTO-7.html

and

https://www.kernel.org/doc/Documentation/PCI/MSI-HOWTO.txt


Have a great day,
Pavel Chubakov

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