Aurora Connector P2041

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Aurora Connector P2041

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guillaume17
Contributor I

Hi,

I have a question about the Aurora connector of the P2041.

In document P2041 QorIQ Integrated Processor Hardware Specifications, Figure 58, SD_TX09_P and all others are not in "Table 1. Pin List by Bus".
Is this normal?

I may not have understood the SerDes use.


Thank you in advance

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ufedor
NXP Employee
NXP Employee

> Is this normal?

This is "cut and paste" issue when the figures were taken from P3041 Hardware Specifications "as is", which is not correct for the P2041.

The P2041 has only one Debug/Aurora lane - Lane A in the SerDes Bank2 (SD_TX/RX[10])

The corrected Figure 58:

2018-04-13_131308.jpg

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812 Views
ufedor
NXP Employee
NXP Employee

> Is this normal?

This is "cut and paste" issue when the figures were taken from P3041 Hardware Specifications "as is", which is not correct for the P2041.

The P2041 has only one Debug/Aurora lane - Lane A in the SerDes Bank2 (SD_TX/RX[10])

The corrected Figure 58:

2018-04-13_131308.jpg