The behavior of PCA21125 RF bit

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The behavior of PCA21125 RF bit

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StrongOrange
Contributor I

Hi, I am looking into PCA21125.

I have performed static validation for my code, and I have a question for RF bit.

I used RF bit as a condition for causing an error in application. However, I would like to know the exact information for its behavior.

My understanding is this:

First of all, the detailed explanation below, it says the first start-up (VDD off to ON)...

1) The oscillator is considered to be stopped. => it means the situation is deemed as a reset condition and set RF bit? It leads to the conclusion that RF bit is always set after VDD off to on situation.

2) During the chip in reset at the moment VDD off to on, should the data (time) from SPI be ignored as its data can be invalid?

StrongOrange_0-1690352324237.png

Thank you.

Sincerely

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JozefKozon
NXP TechSupport
NXP TechSupport

Hi Jonggeun, 

1) VDD Off to On condition set RF bit.

[A] Yes, this is correct. When the power supply is connected to the VDD it takes some time, till the oscillator starts. 

JozefKozon_0-1690369752734.png

2) To exclude RF bit set by VDD Off to On situation, is it the only way to clear RF bit? (such as, clear RF bit once after 2 seconds)

[A] Yes, the RF bit is set a start up and you need to clear it.

JozefKozon_1-1690370095803.png

With Best Regards,

Jozef

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StrongOrange
Contributor I
Thank you for your reply.

Please check this question out too.
https://community.nxp.com/t5/Other-NXP-Products/PCA21125-how-can-I-set-quot-interrupt-output-quot-ri...


Plus) I kindly ask you to remove my name in the post
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StrongOrange
Contributor I

Thank you for your clear explanation.

I would like to make sure.

1) VDD Off to On condition set RF bit.

2) To exclude RF bit set by VDD Off to On situation, is it the only way to clear RF bit? (such as, clear RF bit once after 2 seconds)

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JozefKozon
NXP TechSupport
NXP TechSupport

Hi Jonggeun, 

1) VDD Off to On condition set RF bit.

[A] Yes, this is correct. When the power supply is connected to the VDD it takes some time, till the oscillator starts. 

JozefKozon_0-1690369752734.png

2) To exclude RF bit set by VDD Off to On situation, is it the only way to clear RF bit? (such as, clear RF bit once after 2 seconds)

[A] Yes, the RF bit is set a start up and you need to clear it.

JozefKozon_1-1690370095803.png

With Best Regards,

Jozef

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AshBirari
Contributor I

Hello,
I am facing issue while clearing this RF bit . please refer the below code, after writing I am reading the data by sending Read command but it is giving me value as 0x80(i.e RF bit is SET)

Configurations :

Data width : 8

Transfer start : MSB

Baudrate : 1000000(testing purpose)

Code :

Cdd_Rtc_Spi_TxBuff[2] = {0,0}

Cdd_Rtc_Spi_RxBuff[2] = {0,0} 

READ_CMD = 0x90

WRITE_CMD = 0x10

rtc.png

rf.png

Code To clear the RF bit of Second register :
Cdd_PCAReg.RegSeconds.bit.RF = CDD_RF_CLR;
 Cdd_Rtc_Spi_TxBuff[0]   = WRITE_CMD | REG_SECONDS;
 Cdd_Rtc_Spi_TxBuff[1]   = Cdd_PCAReg.RegSeconds.bit.RF;
RetVal |= Spi_SetupEB(CDD_RTC_SPI_READ_CHNL, &Cdd_Rtc_Spi_TxBuff[INDEX_ZERO], &Cdd_Rtc_Spi_RxBuff[INDEX_ZERO],2);
/*CDD_RTC_SPI_CHNL is ID of the channel which stores the data for transmission. Cdd_Rtc_Spi_TxBuff is Pointer to the buffer which holds the data.
Cdd_Rtc_Spi_RxBuff is Pointer to the buffer which gets the data.  DataIndex is Length to transmit in bytes.*/
/* Send data filled in SPI buffer over SPI */
 RetVal |= Cdd_Rtc_SpiSend_Ab();
 
Code to Read the Second register:
Cdd_Rtc_Spi_TxBuff[1] = 0x00;
Cdd_Rtc_Spi_TxBuff[0] = READ_CMD | Reg_SECOND;
Cdd_Rtc_Spi_TxBuff[1] = (((Cdd_Rtc_Spi_TxBuff[1] & 0x0F)<<4) | ((Cdd_Rtc_Spi_TxBuff[1] & 0xF0)>>4));
RetVal |= Spi_SetupEB(CDD_RTC_SPI_READ_CHNL, &Cdd_Rtc_Spi_TxBuff[INDEX_ZERO], &Cdd_Rtc_Spi_RxBuff[INDEX_ZERO], 2);
RetVal |= Cdd_Rtc_SpiSend_Ab();
 
Similar issue i am facing while clearing POR_OVRD bit.
Will the RTC still show the time data even if POR_OVRD bit is set ?
Please help me to resolve this issue .
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JozefKozon
NXP TechSupport
NXP TechSupport

Hi Jonggeun, 

1) The oscillator is considered to be stopped. => it means the situation is deemed as a reset condition and set RF bit? It leads to the conclusion that RF bit is always set after VDD off to on situation.

[A] Yes, this is correct. Whenever there is no power supply in the VDD pin, the oscillator is not working, but this is not only condition. Even when there is power supply on the VDD pin, the oscillator can be stopped. 

JozefKozon_0-1690360526790.pngJozefKozon_1-1690360578335.png

2) During the chip in reset at the moment VDD off to on, should the data (time) from SPI be ignored as its data can be invalid?

[A] Yes. Please check the STOP bit. You can start to read the time after the STOP bit is released.

JozefKozon_2-1690360646038.png

With Best Regards,

Jozef

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