Hello,
We have custom board with QorIQ T1023 Processor with two MT40A1G16 DDRs. Common chip select (CS0) is connected to both DDRs, DQ(0-15) is connected to DDR1 and DQ(16-31) is connected to DDR2. However, I have just realized that we can only use 16 row address bits but this DDR have 17 row address bits. So, we cannot use half of the both DDRs. We can only use 2 GB of total 4 GB memory space.
We have some problems:
1- We cannot bring up DDR via Code Warrior because of D_INIT error.
2- We can bring up U-Boot mostly but sometimes (%0.1) we get D_INIT error also in U-Boot.
Our DDR parameters are as follows:
Possible causes of the D_INIT not been cleared:
1) Incorrect connection of DDR chips to processor's DDR interface.
2) Incorrect initialization of the DDR controller registers.
Have you used CodeWarrior QCVS DDR Validation tool to check the SDRAM operation?