PCAL6416A input current when Vi=5.5V and VDD(P)=3.3V

[sylvainbouriot]

Hello,

I want to use PCAL6416A in a new projet. it's written in the datasheet that I/O ports are tolerant to 5V. But there is no information about the input current consumption when Vi=5.5V (input voltage on a IO port) and VDD(P) is lower (e.g VDD(P)=3.3V). Do you have this information?

Best Regards.

Sylvain

[sylvainbouriot]

Tanks Jozef.

Best Regards,

Sylvain

[JozefKozon]

Hello Sylvain,

please see the answers below.

I want to use PCAL6416A in a new project. it's written in the datasheet that I/O ports are tolerant to 5V. But there is no information about the input current consumption when Vi=5.5V (input voltage on a IO port) and VDD(P) is lower (e.g VDD(P)=3.3V). Do you have this information?

[A]please refer to the section 7.5, page 16 od the datasheet.

When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high-impedance input (so there is no current flow, no current consumption). The input voltage may be raised above VDD(P) to a maximum of 5.5 V.

Is it allowed to have a partial power down of the powers supplies? eg: VDD(I2C-bus)=SDA=SCL= 0V whereas VDD(P)=3.3V.

If yes, in this case what is the concurrent consumption on VDD(P)?

[A] no, that is not allowed. For voltage translation both Vdd must be supplied. Please refer to the section 6, page 8 of the datasheet.

For the current consumption please refer to the Table 34. page 32 of the datasheet. There can be seen, that the current consumption is measured for both Vdd(i2C-bus) and the Vdd(p).

With Best Regards,

Jozef

[sylvainbouriot]

Thank you for your answers Jozef.

I understand that it is not allowed to have a partial power down of the power supplies to have a voltage translation, but if there is no communication on the I2C bus, is that also the case?

In my case, the PCAL6416A will be connected with I2C to a microcontroller that is not powered when the board is in "standby". 

In this configuration : VDD(I2C)=0V, SDA=SCL=0V and VDD(P)=3.3V.

Is PCAL6416A still active in this configuration? Could it generate an interrupt on a rising or falling edge of the port inputs in Input mode?

Best Regards.

Sylvain

[JozefKozon · Accepted solution]

Hello Sylvian,

yes, the PCAL6416 will be still active if the VDD(I2C) will be not supplied. The VDD(I2C) supplies only the bus lines, the VDD(P) supplies all the core circuits. Please see below for a paragraph from the datasheet.

"There are two supply voltages for PCAL6416A: VDD(I2C-bus) and VDD(P). VDD(I2C-bus)
provides the supply voltage for the interface at the master side (for example, a
microcontroller) and the VDD(P) provides the supply for core circuits and Port P. The
bidirectional voltage level translation in the PCAL6416A is provided through VDD(I2C-bus).
VDD(I2C-bus) should be connected to the VDD of the external SCL/SDA lines. This indicates
the VDD level of the I2C-bus to the PCAL6416A, while the voltage level on Port P of the
PCAL6416A is determined by the VDD(P)"

!INT pin then needs to be connected through a pull-p to the VDD(P) instead of VDD(I2C), however !INT should be connected to the voltage source of the device that requires the interrupt information.

With Best Regards,

Jozef

[diverger]

Hi,

From the datasheet, it seems the RESET pin is powered by VDD(I2C-bus) too. And the datasheet recommends pull it to VDD(I2C-bus). So, when VDD(i2c-bus) is 0, the chip maybe reset event VDD(P) is powered, right?

Thanks.