Using said device in title, I have a question about I2C bus extension. As a general guideline in the datasheet it gives a circuit layout and resistor values and has details about how the system will be working (Page 10, Figure 9)
However, in my design, I implemented the exact solution and am unable to communicate with the IC's at the end point of the design.
Once I changed the resistances on the Lx and Ly sides of both P82B715's the end point device was able to communicate.
My main question is why would deviating from the datasheet values to the following Lx-Lx pair (4k2 each) and Ly-Ly pair (3k1 and 56k8 respectively) enable the IC's at the end point start working?
There is something that I am missing but I can't quite put my finger on it.
Hi,
This behavior is most probably caused by the rise time and falling time modification on the buffer which is product of the pull-up resistor value and the bus capacitance.
You can find more detailed information in section 6 of the Application note AN10710: https://www.nxp.com/docs/en/application-note/AN10710.pdf
Regards,
Jose
NXP Semiconductor