Hello @bmeyer ,
There is no detailed documentation on these power modes, the power gain compared to deep-power down is limited.
The difference between sleep and deep-sleep is only the handling of the EEPROM.
The power gain is dependent on the Sysclk frequency, as can be seen below in a graph of a typical application.
More power can be conserved by slowing down the Sysclk.
There is a slight increase of the Idd current (up to +12uA) when the Vdd voltage drops below 2.2V.
Hope that helps,
Have a great day,
Kan
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Hello @bmeyer ,
There is no detailed documentation on these power modes, the power gain compared to deep-power down is limited.
The difference between sleep and deep-sleep is only the handling of the EEPROM.
The power gain is dependent on the Sysclk frequency, as can be seen below in a graph of a typical application.
More power can be conserved by slowing down the Sysclk.
There is a slight increase of the Idd current (up to +12uA) when the Vdd voltage drops below 2.2V.
Hope that helps,
Have a great day,
Kan
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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Hello @bmeyer ,
If you have download the SDK package for NHS3152, you may find the doc on this topic, please kindly refer to the following for details.
Hope that helps,
Have a great day,
Kan
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!
- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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