Overview
This reference design shows the simplicity of a soft modem design, how few resources of the processor it takes, and how well it performs on USA average lines. This design omits the standard telecommunications Codec, instead of using PWM for output and ADC for input.
Since both peripherals are readily available on one 56F8300/100 series device, along with more processing power than required from the single core, the design is a true one-chip, one-core system that includes telecommunications ability with room for even more system functionality.
Ideal for advanced motion control, home appliances, medical monitoring, fire and security systems, power management, smart relays, and POS terminals.
Features
- Hybrid architecture facilitates implementation of V.21 and V.22bis modem, control, and signal processing functions in one chip
- Consumes only 7.5 MIPS for the modem function - Only 15K words of Flash for the complete modem application and test harness
- High-performance, secured Flash memory eliminates the need for external storage devices
- Extended temperature range allows for operation of non-volatile memory in harsh environments
- Flash memory emulation of EEPROM eliminates the need for external non-volatile memory
- 32-bit performance with 16-bit code density
- On-chip voltage regulator and power management reduces overall system cost
- Off-chip memory expansion capabilities allow for glueless interfacing with the additional memory of external devices, without sacrificing performance
- Boots directly from Flash, providing additional application flexibility
- High-performance PWM with programmable fault capability simplifies design and promotes compliance with safety regulations
- PWM and ADC modules are tightly coupled to reduce processing overhead; only one of each is used by the modem
- General purpose input/output (GPIO) pins support application-specific needs
- Simple in-application Flash memory programming via Enhanced OnCE or serial communication
