PN7462AU VBUS at 3.3V results to Target error from Commit Flash write

[stefanmueller]

Hi,

we bought the development kit PNEV7462B.

According to user manual UM10883.pdf we used following configuration

- chapter 3.1: External power supply

- chapter 3.2: VBUS set to 3.3V

Now we can't debug the device. We receive following message

15: Target error from Commit Flash write

When I set VBUS to 5V, it debugging is running.

According to manual, the device should run with 3.3V, or?

What else do I have to do?

Thanks and best regards

Stefan

[weidong_sun · Accepted solution]

Hello Stefan,

    I checked schematic of  PN7462AU EVK board and it's data sheet, in datasheet, there are some description on PVDD, see following,please!

-----------

8.15.2.2 PVDD_LDO

...

   The PVDD_LDO provides 3.3 V supply, that can be used for all digital pads. It may also be used to provide 3.3 V power to external components, avoiding an external LDO. It is supplied by VBUS, and requires a minimum voltage of 4 V to be functional. It delivers a maximum of 30 mA.

   The output pin for PVDD_LDO is PVDD_OUT.

   PVDD_LDO is used to provide the necessary supply to PVDD_IN and PVDD_M_IN (pad supply for master interfaces).

When an external supply is used, PVDD_OUT must be connected to the ground. When

the LDO output is connected to the ground, the PN7462 chip switches off the PVDD_LDO.

...

So JP42 should be connected to GND when using external 3.3V, please try it !

Best Regards,

Weidong

[stefanmueller]

Dear Weidong,

thank you for your anwer.

I closed JP42 and I replaced

- R179 to R177

- R181 to 180

it works, thank you very much.

Best Regards

Stefan