CLRC663 Interrupt

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CLRC663 Interrupt

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breezeto
Contributor I

Hello All,

I'm testing the CLRC663's LPCD feature without NFC Reader Library on CLEV6630B board .

Now I can read the UID of tag and can implement LPCD successfully.

But I face a problem when test the interrupt request from CLRC663.

I don't know why the voltage leve of CLRC663  IRQ pin change from high to low level after set the IRQ0En register and enable the interrupt.

 

May I have information for the timing diagram of CRC663 IRQ pin?

And when I need to set this IRQ_Inv bit (Set to one the signal of the IRQ pin is inverted) in IRQ0En register?

Thank so much for your advice.

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CBLeong
Contributor I

I facing this problem also. seem like the IRQ always low will enable IRQPinEn bit. Another question is when any interrupt occur the IRQ pin is rising edge or falling edge? and the hold time is how long?

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IvanRuiz
NXP Employee
NXP Employee

Hello,

May I ask which value you are loading to IRQ0En?

Thank you.

BR,

Ivan.

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breezeto
Contributor I

Hello Ivan

The value of IRQ0En register is loaded 0x80, I only set the IRQ_Inv bit.

At beginning the voltage level of IRQ Pin is high level. It will become to low level when I enable the Timer3 interrupt request on the IRQ1ENn register and the timer3 has an underflow.

But the voltage level of IRQ Pin will not change to high level even I clear the IRQ0 & IRQ1 register (load 0x7F, 0x7F).

I'm not sure does it correct. Or I made any mistake.

Thanks~

Breeze

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IvanRuiz
NXP Employee
NXP Employee

Hello,

Thanks for the explanation, I believe the IRQ1En options are the only one available for IRQ1 interrupt requests e.g., to set the pin as push-pull or open-drain, whilst the inverted functionality is only available for IRQ0 interrupt sources in IQ0En.

Hope it helps.

BR,

Ivan.

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