memory_read_write_issue

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memory_read_write_issue

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Vijay98
Contributor II

Hello Nxp team,

Right now, we are working in memory read, write and erase in S32K312 controller using mbdt block sets.

We have checked the example for memory read, write & erase.

while executing it, it is taking 3 steps to complete erase, read & write.

Vijay98_0-1731845128622.png

But we want to execute the erase, write & read operations in a single instance (step)

Kindly give us some examples or suggestions.

 

Thanks & regards,

Vijay

 

@Irina_Costachescu @dragostoma @FlorinCiuca @DrKarthi @Kavin_raj_mbd  

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FlorinCiuca
NXP Employee
NXP Employee

Hello @Vijay98!

The example model is used to illustrate the different memory operations supported by the driver and is limited to only one operation per Step Function call.

Multiple operations per Step Function call can be achieved using the same approach, by duplicating the MainFunction Trigger Subsystem as many times as needed. The subsystem should be placed after each operation specific(Read, Write, Erase, Compare etc.) function call. In order to prevent possible errors, it is mandatory to wait for the current operation to finish being processed before requesting a new one. 

E.G: For the scenario presented, the function calls should come in the following order:

  1. Mem_Erase function call
  2. MainFunction Trigger Subsystem logic to be executed
  3. Mem_Write function call
  4. MainFunction Trigger Subsystem logic to be executed
  5. Mem_Read function call
  6. MainFunction Trigger Subsystem logic to be executed

This way, all 3 operations are executed in one Step Function call and their desired result can be correctly achieved.

I assumed the 3 operations are used to manipulate data in the same memory sector(MemInstance). If this is the case, and considering that Erase and Write operations are performed each Step Function, depending on the StepFunction period, the number of P/E cycles of the flash memory can be reached relatively fast. The S32K3xx family allows >100000 P/E cycles. The implementation should account for that.

More so, if multiple memory operations are performed each Step Function, based on the volume of data to be handled and on the configured Read/Write page size, significant runtime can be introduced. If the encapsulating project has a Watchdog module or different methods of timeout supervision, in some extreme cases, resets can be triggered. This can be mitigated by increasing the Read/Write Page Size from the configuration project, and/or by using the Mem Access Code Callback(MBDT_Mem_AccessCode_Callback) function to kick the watchdog.

I hope this explanation helps clarify the current issue. If more information is needed, please let me know how can I assist you further.

Best regards,

Florin.

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Vijay98
Contributor II

Hello @FlorinCiuca 

Thanks for your reply

Currently we are facing an issue is that for memory erase, write and read 

This process (function) has to happen sequentially. 

Ex: 1. Erase the memory in the particular address -> Write the data in that address -> Read the data in that address.

But we tried some ways to do that, and we can't be able to get the output.

Step-1: Enable all the three functions 

Vijay98_0-1732030887263.png

 

Step-2: After enabling, first erase the memory of the address.

Vijay98_1-1732030968071.png

 

Step-3: After erasing the memory, and with that status of erase block enabling the Write subsystem. Inside that write subsystem we are writhing the data to the specific address.

Vijay98_2-1732031066004.png

 and we are checking this in freemaster.

 

But we can be able to see the erase block is working (status is getting into 0), but the write block is not working (status is getting into 1).

 

How can we able to achieve memory erase, write and read in a sequential way?

Kindly help us to resolve this issue.

 

And in this below picture, the address in a constant block and trying to fetch the data in that address. Is that possible with the nxp block in other way?

We have another issue is that 

  1. To implement state machine, it is important for write block to take the source data from specific memory address which can be passed by either constant or variable parameter.
  2. But write block is not taking memory location as input. This could cause issue when we will write the more data like 1kb or more.
 

Vijay98_5-1732031432832.jpeg

Kindly help us to resolve this issue 

and i have attached the file with this post.

 

Thanks & regards,

Vijay 

@DrKarthi @Kavin_raj_mbd 

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FlorinCiuca
NXP Employee
NXP Employee

Hello @Vijay98 !

I downloaded the model you provided and I have the following remarks:

For the first issue, I noticed that the Mem_MainFunction block is misplaced. It is absolutely necessary for the Mem_MainFunction to be executed as many times as required after each operation specific function call. The way it is currently implemented now, it will be executed only once. Please see my previous reply as well. In order to fix this, please add the MainFunction Trigger Subsystem after each Erase/Read/Write operation block. The number of function specific blocks and the number of MainFunction Subsystems must be equal.

More so, I do not recommend cascading the blocks as in the provided model. Since you mentioned that the final model will have a state machine, it is more reliable to add the Function specific block and the MainFunction Subsystem in their specific state. In this way, they are controllable by a state variable and not by a status that may or may not be the expected one. For example, while in "Erase" state, apart from additional algorithms you may implement, the following logic must be executed:

FlorinCiuca_0-1732145417498.png

After the Erase operation is successful, the State Machine can switch to "Write" state, which should look similar, the only difference being the Mem_Erase operation being replaced by the Mem_Write. And so on. If you include both the operation specific function call and the MainFunction Trigger Subsystem, you should be able to execute sequentially as many operations as needed(with the limitations mentioned in my first reply).

 

As for the second question, I believe there might be some confusion with how the Mem_Write function operates. The content of the attached picture is not taken from the provided model. In the picture, it seems to be an issue on how the second input of the block is interpreted. It appears that the SourceAddress value is being fed into the block as the Source Data, which will cause errors. The Mem_Write block has 3 input parameters:

  1. TargetAddress. This parameter specifies at which address to start writing data in the desired memory zone.
  2. Source Data. This parameter specifies the content to be written at the target address.
  3. Length. This parameter specifies how much from the provided Source Data to be written at the target address.

If there is further confusion on how some inputs of the block are implemented for different Mem functions, please refer to the Mem Block and Example help files.

FlorinCiuca_1-1732146512836.png

1. Source Data can be taken from anywhere(Data Stores, State Machine Outputs, Constant values, even Mem_Read outputs etc.) and can be fed into the Mem_Write block as long as it is structured in an array of uint8 values.

2. As previously stated, the Mem_Write block accepts memory location as an input, on the TargetAddress parameter. The TargetAddress can be fetched the same way as Source Data and can be fed directly into the block, as long as it is a valid uint32 value that does not exceed the defined range for the configured Mem Instance.

I hope this will help fix your current issues with the model.

Best regards,

Florin. 

 

 

 

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Vijay98
Contributor II

Hello Nxp team,

We are using memory read write erase examples for storing the data into memory.

But we want to know that,

We have a data of 32kb in Ram address and we want to store it into Eeprom memory and for storing 32kb ram parameter to EEPROM, need to erase 32kb eeprom and write 32kb data. And 32kb need to do be configurable.

For this is there any examples for how to implement it?

@FlorinCiuca 

Thanks & regards,

Vijay

 

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FlorinCiuca
NXP Employee
NXP Employee

Hello @Vijay98 !

There are several limitations in regard to the presented scenario. 

First of all, the S32K312 does not have dedicated EEPROM hardware.  It only supports EEPROM emulation(FEE), using the embedded Flash memory. Fee memory support is currently under development and will become available with the next S32K3 SW release. If desired, custom code(https://community.nxp.com/t5/NXP-Model-Based-Design-Tools/How-to-use-your-own-C-code-in-our-Toolbox-...) can be used to implement the Fee functionality, if desired.

Secondly, 32 kb is a rather large chunk of data to be handled at once. Not only it will take long period of time to finish writing the data (on the order of milliseconds), but most embedded memory types are not designed to handle that much data in a single operation.

There are 2 persistent memory types available on the S32K312 board: Internal Flash and Fee.

Depending on the specifics of this storage operation, there are a few key things to be considered when choosing the persistent memory type and implementation:

  1. How often is this transfer performed? If the RAM -> Flash/Fee is performed with a high frequency, the Flash memory can reach its limit rather quickly if wear-leveling algorithms are not implemented.
  2. How can the data be structured into smaller pieces? Maximum data size allowed for Flash is 8kb and for Fee it depends on other limiting factors(metadata, header info, validity bits, ECC, wear-leveling info etc.). Since it is emulated on Flash memory sectors, the actual data size is smaller than 8kb, because up to 1.5kb can be used for storing previously mentioned information.

The easiest way to store the data is to split it into 4 equal pieces, configure 4 Internal Flash sectors and write it sequentially, as previously explained. If the transfer is performed rather often, all 16 available sectors can be configured and writing can be alternated(first write operation will use sectors 0->3, second write operation will use sectors 4->7 and so on). By doing this the lifespan of the Flash memory will be extended by a factor of 4.(~100k operations to ~400k). This is also the most efficient way in terms of speed and memory sectors allocation.

If the 32kb of data can be divided into smaller pieces, it may be more convenient to store it into Fee, but only if updates are frequent and only small portions of data change.

If the updates generally involve the entire 32kb and are rather infrequent, Flash memory is best suitable.

Please take into consideration these limitations of both memory types and choose the one that best suits your needs.

Best regards,

Florin.

 

 

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Vijay98
Contributor II

Hello @FlorinCiuca 

We have tried the example of memory internal flash S32ct in Nxp mbdt toolbox

Vijay98_0-1733203014992.png

We tried to access the internal memory flash to erase, write & read of 8kb of memory with this example.

Issues

1. When we are trying to erase and write for the length of 8kb and 4kb we are not seeing any data written in the length of 4kb & 8kb.
2. Unable to read the data from the different source address with different target address using the given examples.
3.is there any example for erase & write the data to target address and read from the source address for total 8kb?

And

for total of 32kb sector wise flash of 8kb in sequential order is there any examples?

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FlorinCiuca
NXP Employee
NXP Employee

Hello @Vijay98 !

The example provided with the toolbox is meant only to illustrate how the Internal Flash can be used. It does not generally comply with more complex scenarios, such as the one you described. In order to extend its capabilities, several steps need to be performed beforehand: configuring additional memory sectors, increasing the number of blocks in the Simulink canvas so that all operations are performed correctly and at the right time etc.

For your questions, I have the following remarks:

  1.  The example has only one 8KB sector configured. You can try debugging the code in an IDE to see the error thrown by the Mem module. Without the source code and the configuration project, I can only guess the probable root-cause. Either one or more of the parameters given to the Mem_Write function is/are incorrect, or the targeted memory zone was not erased beforehand, or the Write Page size is too small and needs to be configured to be bigger. 
  2. With the provided example you should be able to read/write data into any address within the 0x10000000 to 0x100020000 range, with the mention that  the invoked address needs to be aligned with the configured value from the configuration project.
  3. To answer both of your questions, the plain answer is no. There are no other Internal Flash examples that  handle those amounts of data. Using my previous replies, please try to configure more memory sectors based on your needs and populate them accordingly.

Best regards,

Florin.

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Vijay98
Contributor II

Hello @FlorinCiuca 

We tried to write the 8 kb of data into the memory. But right now, we can be able to write 128 bytes of data in memory i.e., maximum mem write page size value is 128 bytes.

Vijay98_1-1733741302845.png

 

Kindly help us to increase this size to 8kb.

 1. We tried to increase the sector batch, but we can't able to change the mem start address.

i.e., For mem sector batch - the start address is 0x10000000 and the write size is 128 bytes, the end address will be 0x1000007F.

and with mem sector batch 1 - we want to give start address as 0x10000080, but for batch 1 the start address is 0x10002000

Then, is there any other way to write the data of 8kb after 128 bytes.

 

Kindly check our model for Write, read and erase 8kb of data into memory with this post.

 

Thanks & regards,

Vijay

 

 

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Vijay98
Contributor II

Hello nxp team,

Any update on memory write, read and erase for 4kb & 8kb of data.

Kindly help us to resolve this issue.

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Vijay98
Contributor II

Hello Nxp team, 

Any update on our previous post for Memory issue?

Kindly help us to resolve this issue.

 

Thanks & regards,

Vija

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