space allocation

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朱先生
Contributor III

Hi, ALL:

 

Tools

Micro: MPC5604B

IDE: codeworrior IDE version 5.9.0

 

Question:

I have a question about using .lcf. I want to allocate my code into two flash blocks.

one is in Code Flash Sector 0(start addrees:0x00000000  end address:0x00007FFF), the other is in Code Flash Sector 6(start addrees:0x00040000  end address:0x0005FFFF). The first one is placed in text section, the second one is placed in internal_flash.

The updated .lcf file is shown below:

MEMORY

{

    resetvector:           org = 0x00000000,   len = 0x00000008

    init:           org = 0x00000020,   len = 0x00000FE0

    interrupts_flash:      org = 0x00041000,   len = 0x00001000

    internal_flash:        org = 0x00042000,   len = 0x0003E000

    internal_ram:          org = 0x40000000,   len = 0x00006600

    heap  :                org = 0x40006600,   len = 0x00000900

    stack :                org = 0x40007000,   len = 0x00001000 

}

/* This will ensure the rchw and reset vector are not stripped by the linker */

FORCEACTIVE { "bam_rchw" "bam_resetvector"}

 

SECTIONS

{

   .__bam_bootarea LOAD (0x00000000): {} > resetvector

    GROUP : {

      .init LOAD (0x00000020) : {}

    

      .init_vle (VLECODE) LOAD (_e_init) : {

        *(.init)

        *(.init_vle)

      }

    } > init

   GROUP : {                /* Note: _e_ prefix enables load after END of that specified section */

      .ivor_branch_table (VLECODE) LOAD (ADDR(interrupts_flash)) : {}

      .intc_hw_branch_table (VLECODE) LOAD (_e_ivor_branch_table) ALIGN (0x800) : {}

      .ivor_handlers (VLECODE) LOAD (_e_intc_hw_branch_table) : {} /* Each MPC555x handler require 16B alignmt */

   } > interrupts_flash

   GROUP  : {

   .intc_sw_isr_vector_table ALIGN (2048) : {} /* For INTC in SW Vector Mode */

.text : {}

.text_vle (VLECODE) ALIGN(0x08): {

  *(.text)

*(.text_vle)

       }

.rodata (CONST) : {

         *(.rdata)

         *(.rodata)

       }

.ctors : {}

.dtors : {}

       extab : {}

       extabindex : {}

    } > internal_flash

GROUP : {

  .__uninitialized_intc_handlertable ALIGN(0x08) : {}

       .data   : {}

       .sdata  : {}

       .sbss   : {}

       .sdata2 : {}

       .sbss2  : {}

       .bss    : {}

    } > internal_ram

}

/* Freescale CodeWarrior compiler address designations */

_stack_addr = ADDR(stack)+SIZEOF(stack);

_stack_end  = ADDR(stack);

_heap_addr  = ADDR(heap);

_heap_end   = ADDR(heap)+SIZEOF(heap);

__IVPR_VALUE = ADDR(interrupts_flash);

/* L2 SRAM Location (used for L2 SRAM initialization) */

L2SRAM_LOCATION = 0x40000000;

 

Then modify the rom image address as below:

155550_155550.pngpastedImage_13.png

 

When I compile and link the code , warning message will be shown:

155551_155551.pngpastedImage_14.png

If I change the  ROM image address to 0x00042000 (equal to internal_flash address). There are no warning message.

 

In my understanding, the objects stored in flash should be code or constant data, so their virtual address should be equal to ROM address. They needn't copy operation. but actually the address are not the same.

155556_155556.pngpastedImage_16.png 

 

Why? what's the relationship between ROM image address and memory allocation?

Thanks for your reply.

 

Best Regards

Bryce

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stanish
NXP Employee
NXP Employee

Hi,

When "Generate ROM image" is checked then linker generates ROM (flash) block for global variables/objects that needs to be initialized during start-up. If not checked e.g. RAM target this initialization is done by debugger.

Now "ROM Image Address" determines where this block should be placed.

The address should match with start address of the  main flash block - which is usually internal_flash (0x00042000).

So the ROM image block is physically placed at the first free address available in this memory segment (so after all sections that are placed into internal_flash).

The memory map you posted probably refers to the previous case -Rom Image Address set  0x00041000.

Note:

Regarding RAM Buffer Address - It's recommended to keep the address the same as ROM Image Address.

It specifies the address in RAM that is to be used as a buffer for the flash image programmer. But this feature is not used by current run control devices.

RAM buffer is not created/used when the RAM address equals to the ROM address.

Hope it helps.

Regards,

Stan

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stanish
NXP Employee
NXP Employee

Hi,

When "Generate ROM image" is checked then linker generates ROM (flash) block for global variables/objects that needs to be initialized during start-up. If not checked e.g. RAM target this initialization is done by debugger.

Now "ROM Image Address" determines where this block should be placed.

The address should match with start address of the  main flash block - which is usually internal_flash (0x00042000).

So the ROM image block is physically placed at the first free address available in this memory segment (so after all sections that are placed into internal_flash).

The memory map you posted probably refers to the previous case -Rom Image Address set  0x00041000.

Note:

Regarding RAM Buffer Address - It's recommended to keep the address the same as ROM Image Address.

It specifies the address in RAM that is to be used as a buffer for the flash image programmer. But this feature is not used by current run control devices.

RAM buffer is not created/used when the RAM address equals to the ROM address.

Hope it helps.

Regards,

Stan

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